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@@ -183,6 +183,12 @@
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clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
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clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
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clock-names = "clcdclk", "apb_pclk";
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clock-names = "clcdclk", "apb_pclk";
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};
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};
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+
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+ virtio_block@0130000 {
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+ compatible = "virtio,mmio";
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+ reg = <0x130000 0x200>;
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+ interrupts = <42>;
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+ };
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};
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};
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v2m_fixed_3v3: fixedregulator@0 {
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v2m_fixed_3v3: fixedregulator@0 {
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