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@@ -48,8 +48,16 @@
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struct mlxsw_reg_info {
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u16 id;
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u16 len; /* In u8 */
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+ const char *name;
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};
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+#define MLXSW_REG_DEFINE(_name, _id, _len) \
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+static const struct mlxsw_reg_info mlxsw_reg_##_name = { \
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+ .id = _id, \
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+ .len = _len, \
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+ .name = #_name, \
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+}
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+
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#define MLXSW_REG(type) (&mlxsw_reg_##type)
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#define MLXSW_REG_LEN(type) MLXSW_REG(type)->len
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#define MLXSW_REG_ZERO(type, payload) memset(payload, 0, MLXSW_REG(type)->len)
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@@ -61,10 +69,7 @@ struct mlxsw_reg_info {
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#define MLXSW_REG_SGCR_ID 0x2000
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#define MLXSW_REG_SGCR_LEN 0x10
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-static const struct mlxsw_reg_info mlxsw_reg_sgcr = {
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- .id = MLXSW_REG_SGCR_ID,
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- .len = MLXSW_REG_SGCR_LEN,
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-};
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+MLXSW_REG_DEFINE(sgcr, MLXSW_REG_SGCR_ID, MLXSW_REG_SGCR_LEN);
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/* reg_sgcr_llb
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* Link Local Broadcast (Default=0)
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@@ -87,10 +92,7 @@ static inline void mlxsw_reg_sgcr_pack(char *payload, bool llb)
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#define MLXSW_REG_SPAD_ID 0x2002
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#define MLXSW_REG_SPAD_LEN 0x10
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-static const struct mlxsw_reg_info mlxsw_reg_spad = {
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- .id = MLXSW_REG_SPAD_ID,
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- .len = MLXSW_REG_SPAD_LEN,
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-};
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+MLXSW_REG_DEFINE(spad, MLXSW_REG_SPAD_ID, MLXSW_REG_SPAD_LEN);
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/* reg_spad_base_mac
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* Base MAC address for the switch partitions.
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@@ -109,10 +111,7 @@ MLXSW_ITEM_BUF(reg, spad, base_mac, 0x02, 6);
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#define MLXSW_REG_SMID_ID 0x2007
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#define MLXSW_REG_SMID_LEN 0x240
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-static const struct mlxsw_reg_info mlxsw_reg_smid = {
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- .id = MLXSW_REG_SMID_ID,
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- .len = MLXSW_REG_SMID_LEN,
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-};
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+MLXSW_REG_DEFINE(smid, MLXSW_REG_SMID_ID, MLXSW_REG_SMID_LEN);
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/* reg_smid_swid
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* Switch partition ID.
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@@ -156,10 +155,7 @@ static inline void mlxsw_reg_smid_pack(char *payload, u16 mid,
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#define MLXSW_REG_SSPR_ID 0x2008
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#define MLXSW_REG_SSPR_LEN 0x8
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-static const struct mlxsw_reg_info mlxsw_reg_sspr = {
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- .id = MLXSW_REG_SSPR_ID,
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- .len = MLXSW_REG_SSPR_LEN,
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-};
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+MLXSW_REG_DEFINE(sspr, MLXSW_REG_SSPR_ID, MLXSW_REG_SSPR_LEN);
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/* reg_sspr_m
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* Master - if set, then the record describes the master system port.
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@@ -215,10 +211,7 @@ static inline void mlxsw_reg_sspr_pack(char *payload, u8 local_port)
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#define MLXSW_REG_SFDAT_ID 0x2009
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#define MLXSW_REG_SFDAT_LEN 0x8
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-static const struct mlxsw_reg_info mlxsw_reg_sfdat = {
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- .id = MLXSW_REG_SFDAT_ID,
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- .len = MLXSW_REG_SFDAT_LEN,
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-};
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+MLXSW_REG_DEFINE(sfdat, MLXSW_REG_SFDAT_ID, MLXSW_REG_SFDAT_LEN);
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/* reg_sfdat_swid
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* Switch partition ID.
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@@ -256,10 +249,7 @@ static inline void mlxsw_reg_sfdat_pack(char *payload, u32 age_time)
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#define MLXSW_REG_SFD_LEN (MLXSW_REG_SFD_BASE_LEN + \
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MLXSW_REG_SFD_REC_LEN * MLXSW_REG_SFD_REC_MAX_COUNT)
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-static const struct mlxsw_reg_info mlxsw_reg_sfd = {
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- .id = MLXSW_REG_SFD_ID,
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- .len = MLXSW_REG_SFD_LEN,
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-};
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+MLXSW_REG_DEFINE(sfd, MLXSW_REG_SFD_ID, MLXSW_REG_SFD_LEN);
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/* reg_sfd_swid
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* Switch partition ID for queries. Reserved on Write.
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@@ -580,10 +570,7 @@ mlxsw_reg_sfd_mc_pack(char *payload, int rec_index,
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#define MLXSW_REG_SFN_LEN (MLXSW_REG_SFN_BASE_LEN + \
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MLXSW_REG_SFN_REC_LEN * MLXSW_REG_SFN_REC_MAX_COUNT)
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-static const struct mlxsw_reg_info mlxsw_reg_sfn = {
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- .id = MLXSW_REG_SFN_ID,
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- .len = MLXSW_REG_SFN_LEN,
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-};
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+MLXSW_REG_DEFINE(sfn, MLXSW_REG_SFN_ID, MLXSW_REG_SFN_LEN);
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/* reg_sfn_swid
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* Switch partition ID.
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@@ -701,10 +688,7 @@ static inline void mlxsw_reg_sfn_mac_lag_unpack(char *payload, int rec_index,
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#define MLXSW_REG_SPMS_ID 0x200D
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#define MLXSW_REG_SPMS_LEN 0x404
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-static const struct mlxsw_reg_info mlxsw_reg_spms = {
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- .id = MLXSW_REG_SPMS_ID,
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- .len = MLXSW_REG_SPMS_LEN,
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-};
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+MLXSW_REG_DEFINE(spms, MLXSW_REG_SPMS_ID, MLXSW_REG_SPMS_LEN);
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/* reg_spms_local_port
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* Local port number.
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@@ -748,10 +732,7 @@ static inline void mlxsw_reg_spms_vid_pack(char *payload, u16 vid,
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#define MLXSW_REG_SPVID_ID 0x200E
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#define MLXSW_REG_SPVID_LEN 0x08
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-static const struct mlxsw_reg_info mlxsw_reg_spvid = {
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- .id = MLXSW_REG_SPVID_ID,
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- .len = MLXSW_REG_SPVID_LEN,
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-};
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+MLXSW_REG_DEFINE(spvid, MLXSW_REG_SPVID_ID, MLXSW_REG_SPVID_LEN);
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/* reg_spvid_local_port
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* Local port number.
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@@ -792,10 +773,7 @@ static inline void mlxsw_reg_spvid_pack(char *payload, u8 local_port, u16 pvid)
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#define MLXSW_REG_SPVM_LEN (MLXSW_REG_SPVM_BASE_LEN + \
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MLXSW_REG_SPVM_REC_LEN * MLXSW_REG_SPVM_REC_MAX_COUNT)
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-static const struct mlxsw_reg_info mlxsw_reg_spvm = {
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- .id = MLXSW_REG_SPVM_ID,
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- .len = MLXSW_REG_SPVM_LEN,
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-};
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+MLXSW_REG_DEFINE(spvm, MLXSW_REG_SPVM_ID, MLXSW_REG_SPVM_LEN);
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/* reg_spvm_pt
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* Priority tagged. If this bit is set, packets forwarded to the port with
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@@ -891,10 +869,7 @@ static inline void mlxsw_reg_spvm_pack(char *payload, u8 local_port,
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#define MLXSW_REG_SPAFT_ID 0x2010
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#define MLXSW_REG_SPAFT_LEN 0x08
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-static const struct mlxsw_reg_info mlxsw_reg_spaft = {
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- .id = MLXSW_REG_SPAFT_ID,
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- .len = MLXSW_REG_SPAFT_LEN,
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-};
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+MLXSW_REG_DEFINE(spaft, MLXSW_REG_SPAFT_ID, MLXSW_REG_SPAFT_LEN);
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/* reg_spaft_local_port
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* Local port number.
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@@ -947,10 +922,7 @@ static inline void mlxsw_reg_spaft_pack(char *payload, u8 local_port,
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#define MLXSW_REG_SFGC_ID 0x2011
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#define MLXSW_REG_SFGC_LEN 0x10
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-static const struct mlxsw_reg_info mlxsw_reg_sfgc = {
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- .id = MLXSW_REG_SFGC_ID,
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- .len = MLXSW_REG_SFGC_LEN,
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-};
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+MLXSW_REG_DEFINE(sfgc, MLXSW_REG_SFGC_ID, MLXSW_REG_SFGC_LEN);
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enum mlxsw_reg_sfgc_type {
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MLXSW_REG_SFGC_TYPE_BROADCAST,
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@@ -1045,10 +1017,7 @@ mlxsw_reg_sfgc_pack(char *payload, enum mlxsw_reg_sfgc_type type,
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#define MLXSW_REG_SFTR_ID 0x2012
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#define MLXSW_REG_SFTR_LEN 0x420
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-static const struct mlxsw_reg_info mlxsw_reg_sftr = {
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- .id = MLXSW_REG_SFTR_ID,
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- .len = MLXSW_REG_SFTR_LEN,
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-};
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+MLXSW_REG_DEFINE(sftr, MLXSW_REG_SFTR_ID, MLXSW_REG_SFTR_LEN);
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/* reg_sftr_swid
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* Switch partition ID with which to associate the port.
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@@ -1118,10 +1087,7 @@ static inline void mlxsw_reg_sftr_pack(char *payload,
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#define MLXSW_REG_SFDF_ID 0x2013
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#define MLXSW_REG_SFDF_LEN 0x14
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-static const struct mlxsw_reg_info mlxsw_reg_sfdf = {
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- .id = MLXSW_REG_SFDF_ID,
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- .len = MLXSW_REG_SFDF_LEN,
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-};
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+MLXSW_REG_DEFINE(sfdf, MLXSW_REG_SFDF_ID, MLXSW_REG_SFDF_LEN);
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/* reg_sfdf_swid
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* Switch partition ID.
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@@ -1205,10 +1171,7 @@ MLXSW_ITEM32(reg, sfdf, lag_fid_lag_id, 0x08, 0, 10);
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#define MLXSW_REG_SLDR_ID 0x2014
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#define MLXSW_REG_SLDR_LEN 0x0C /* counting in only one port in list */
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-static const struct mlxsw_reg_info mlxsw_reg_sldr = {
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- .id = MLXSW_REG_SLDR_ID,
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- .len = MLXSW_REG_SLDR_LEN,
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-};
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+MLXSW_REG_DEFINE(sldr, MLXSW_REG_SLDR_ID, MLXSW_REG_SLDR_LEN);
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enum mlxsw_reg_sldr_op {
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/* Indicates a creation of a new LAG-ID, lag_id must be valid */
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@@ -1288,10 +1251,7 @@ static inline void mlxsw_reg_sldr_lag_remove_port_pack(char *payload, u8 lag_id,
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#define MLXSW_REG_SLCR_ID 0x2015
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#define MLXSW_REG_SLCR_LEN 0x10
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-static const struct mlxsw_reg_info mlxsw_reg_slcr = {
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- .id = MLXSW_REG_SLCR_ID,
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- .len = MLXSW_REG_SLCR_LEN,
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-};
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+MLXSW_REG_DEFINE(slcr, MLXSW_REG_SLCR_ID, MLXSW_REG_SLCR_LEN);
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enum mlxsw_reg_slcr_pp {
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/* Global Configuration (for all ports) */
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@@ -1404,10 +1364,7 @@ static inline void mlxsw_reg_slcr_pack(char *payload, u16 lag_hash)
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#define MLXSW_REG_SLCOR_ID 0x2016
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#define MLXSW_REG_SLCOR_LEN 0x10
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-static const struct mlxsw_reg_info mlxsw_reg_slcor = {
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- .id = MLXSW_REG_SLCOR_ID,
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- .len = MLXSW_REG_SLCOR_LEN,
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-};
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+MLXSW_REG_DEFINE(slcor, MLXSW_REG_SLCOR_ID, MLXSW_REG_SLCOR_LEN);
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enum mlxsw_reg_slcor_col {
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/* Port is added with collector disabled */
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@@ -1490,10 +1447,7 @@ static inline void mlxsw_reg_slcor_col_disable_pack(char *payload,
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#define MLXSW_REG_SPMLR_ID 0x2018
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#define MLXSW_REG_SPMLR_LEN 0x8
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-static const struct mlxsw_reg_info mlxsw_reg_spmlr = {
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- .id = MLXSW_REG_SPMLR_ID,
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- .len = MLXSW_REG_SPMLR_LEN,
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-};
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+MLXSW_REG_DEFINE(spmlr, MLXSW_REG_SPMLR_ID, MLXSW_REG_SPMLR_LEN);
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/* reg_spmlr_local_port
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* Local port number.
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@@ -1544,10 +1498,7 @@ static inline void mlxsw_reg_spmlr_pack(char *payload, u8 local_port,
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#define MLXSW_REG_SVFA_ID 0x201C
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#define MLXSW_REG_SVFA_LEN 0x10
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-static const struct mlxsw_reg_info mlxsw_reg_svfa = {
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- .id = MLXSW_REG_SVFA_ID,
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- .len = MLXSW_REG_SVFA_LEN,
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-};
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+MLXSW_REG_DEFINE(svfa, MLXSW_REG_SVFA_ID, MLXSW_REG_SVFA_LEN);
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/* reg_svfa_swid
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* Switch partition ID.
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@@ -1636,10 +1587,7 @@ static inline void mlxsw_reg_svfa_pack(char *payload, u8 local_port,
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#define MLXSW_REG_SVPE_ID 0x201E
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#define MLXSW_REG_SVPE_LEN 0x4
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-static const struct mlxsw_reg_info mlxsw_reg_svpe = {
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- .id = MLXSW_REG_SVPE_ID,
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- .len = MLXSW_REG_SVPE_LEN,
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-};
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+MLXSW_REG_DEFINE(svpe, MLXSW_REG_SVPE_ID, MLXSW_REG_SVPE_LEN);
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/* reg_svpe_local_port
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* Local port number
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@@ -1672,10 +1620,7 @@ static inline void mlxsw_reg_svpe_pack(char *payload, u8 local_port,
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#define MLXSW_REG_SFMR_ID 0x201F
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#define MLXSW_REG_SFMR_LEN 0x18
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-static const struct mlxsw_reg_info mlxsw_reg_sfmr = {
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- .id = MLXSW_REG_SFMR_ID,
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- .len = MLXSW_REG_SFMR_LEN,
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-};
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+MLXSW_REG_DEFINE(sfmr, MLXSW_REG_SFMR_ID, MLXSW_REG_SFMR_LEN);
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enum mlxsw_reg_sfmr_op {
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MLXSW_REG_SFMR_OP_CREATE_FID,
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@@ -1762,10 +1707,7 @@ static inline void mlxsw_reg_sfmr_pack(char *payload,
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MLXSW_REG_SPVMLR_REC_LEN * \
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MLXSW_REG_SPVMLR_REC_MAX_COUNT)
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-static const struct mlxsw_reg_info mlxsw_reg_spvmlr = {
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- .id = MLXSW_REG_SPVMLR_ID,
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- .len = MLXSW_REG_SPVMLR_LEN,
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-};
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+MLXSW_REG_DEFINE(spvmlr, MLXSW_REG_SPVMLR_ID, MLXSW_REG_SPVMLR_LEN);
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/* reg_spvmlr_local_port
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* Local ingress port.
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@@ -1823,10 +1765,7 @@ static inline void mlxsw_reg_spvmlr_pack(char *payload, u8 local_port,
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#define MLXSW_REG_QTCT_ID 0x400A
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#define MLXSW_REG_QTCT_LEN 0x08
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-static const struct mlxsw_reg_info mlxsw_reg_qtct = {
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- .id = MLXSW_REG_QTCT_ID,
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- .len = MLXSW_REG_QTCT_LEN,
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-};
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+MLXSW_REG_DEFINE(qtct, MLXSW_REG_QTCT_ID, MLXSW_REG_QTCT_LEN);
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/* reg_qtct_local_port
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* Local port number.
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@@ -1875,10 +1814,7 @@ static inline void mlxsw_reg_qtct_pack(char *payload, u8 local_port,
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#define MLXSW_REG_QEEC_ID 0x400D
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#define MLXSW_REG_QEEC_LEN 0x1C
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-static const struct mlxsw_reg_info mlxsw_reg_qeec = {
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- .id = MLXSW_REG_QEEC_ID,
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- .len = MLXSW_REG_QEEC_LEN,
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-};
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+MLXSW_REG_DEFINE(qeec, MLXSW_REG_QEEC_ID, MLXSW_REG_QEEC_LEN);
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/* reg_qeec_local_port
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* Local port number.
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@@ -2000,10 +1936,7 @@ static inline void mlxsw_reg_qeec_pack(char *payload, u8 local_port,
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#define MLXSW_REG_PMLP_ID 0x5002
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#define MLXSW_REG_PMLP_LEN 0x40
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-static const struct mlxsw_reg_info mlxsw_reg_pmlp = {
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- .id = MLXSW_REG_PMLP_ID,
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- .len = MLXSW_REG_PMLP_LEN,
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-};
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+MLXSW_REG_DEFINE(pmlp, MLXSW_REG_PMLP_ID, MLXSW_REG_PMLP_LEN);
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/* reg_pmlp_rxtx
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* 0 - Tx value is used for both Tx and Rx.
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@@ -2059,10 +1992,7 @@ static inline void mlxsw_reg_pmlp_pack(char *payload, u8 local_port)
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#define MLXSW_REG_PMTU_ID 0x5003
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#define MLXSW_REG_PMTU_LEN 0x10
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-static const struct mlxsw_reg_info mlxsw_reg_pmtu = {
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- .id = MLXSW_REG_PMTU_ID,
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- .len = MLXSW_REG_PMTU_LEN,
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-};
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+MLXSW_REG_DEFINE(pmtu, MLXSW_REG_PMTU_ID, MLXSW_REG_PMTU_LEN);
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/* reg_pmtu_local_port
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|
* Local port number.
|
|
@@ -2116,10 +2046,7 @@ static inline void mlxsw_reg_pmtu_pack(char *payload, u8 local_port,
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|
#define MLXSW_REG_PTYS_ID 0x5004
|
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|
#define MLXSW_REG_PTYS_LEN 0x40
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|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_ptys = {
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|
- .id = MLXSW_REG_PTYS_ID,
|
|
|
- .len = MLXSW_REG_PTYS_LEN,
|
|
|
-};
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|
+MLXSW_REG_DEFINE(ptys, MLXSW_REG_PTYS_ID, MLXSW_REG_PTYS_LEN);
|
|
|
|
|
|
/* reg_ptys_local_port
|
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|
* Local port number.
|
|
@@ -2232,10 +2159,7 @@ static inline void mlxsw_reg_ptys_unpack(char *payload, u32 *p_eth_proto_cap,
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#define MLXSW_REG_PPAD_ID 0x5005
|
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|
#define MLXSW_REG_PPAD_LEN 0x10
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|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_ppad = {
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|
- .id = MLXSW_REG_PPAD_ID,
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|
- .len = MLXSW_REG_PPAD_LEN,
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|
-};
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|
+MLXSW_REG_DEFINE(ppad, MLXSW_REG_PPAD_ID, MLXSW_REG_PPAD_LEN);
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|
|
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|
/* reg_ppad_single_base_mac
|
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* 0: base_mac, local port should be 0 and mac[7:0] is
|
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@@ -2273,10 +2197,7 @@ static inline void mlxsw_reg_ppad_pack(char *payload, bool single_base_mac,
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#define MLXSW_REG_PAOS_ID 0x5006
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#define MLXSW_REG_PAOS_LEN 0x10
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|
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|
-static const struct mlxsw_reg_info mlxsw_reg_paos = {
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- .id = MLXSW_REG_PAOS_ID,
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|
- .len = MLXSW_REG_PAOS_LEN,
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-};
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+MLXSW_REG_DEFINE(paos, MLXSW_REG_PAOS_ID, MLXSW_REG_PAOS_LEN);
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/* reg_paos_swid
|
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|
* Switch partition ID with which to associate the port.
|
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@@ -2356,10 +2277,7 @@ static inline void mlxsw_reg_paos_pack(char *payload, u8 local_port,
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#define MLXSW_REG_PFCC_ID 0x5007
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#define MLXSW_REG_PFCC_LEN 0x20
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-static const struct mlxsw_reg_info mlxsw_reg_pfcc = {
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- .id = MLXSW_REG_PFCC_ID,
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- .len = MLXSW_REG_PFCC_LEN,
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|
-};
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+MLXSW_REG_DEFINE(pfcc, MLXSW_REG_PFCC_ID, MLXSW_REG_PFCC_LEN);
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|
|
|
|
/* reg_pfcc_local_port
|
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|
* Local port number.
|
|
@@ -2495,10 +2413,7 @@ static inline void mlxsw_reg_pfcc_pack(char *payload, u8 local_port)
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#define MLXSW_REG_PPCNT_ID 0x5008
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#define MLXSW_REG_PPCNT_LEN 0x100
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|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_ppcnt = {
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|
- .id = MLXSW_REG_PPCNT_ID,
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|
- .len = MLXSW_REG_PPCNT_LEN,
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|
-};
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|
+MLXSW_REG_DEFINE(ppcnt, MLXSW_REG_PPCNT_ID, MLXSW_REG_PPCNT_LEN);
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|
|
|
|
/* reg_ppcnt_swid
|
|
|
* For HCA: must be always 0.
|
|
@@ -2768,10 +2683,7 @@ static inline void mlxsw_reg_ppcnt_pack(char *payload, u8 local_port,
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|
#define MLXSW_REG_PPTB_ID 0x500B
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|
#define MLXSW_REG_PPTB_LEN 0x10
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_pptb = {
|
|
|
- .id = MLXSW_REG_PPTB_ID,
|
|
|
- .len = MLXSW_REG_PPTB_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(pptb, MLXSW_REG_PPTB_ID, MLXSW_REG_PPTB_LEN);
|
|
|
|
|
|
enum {
|
|
|
MLXSW_REG_PPTB_MM_UM,
|
|
@@ -2865,10 +2777,7 @@ static inline void mlxsw_reg_pptb_prio_to_buff_pack(char *payload, u8 prio,
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|
#define MLXSW_REG_PBMC_ID 0x500C
|
|
|
#define MLXSW_REG_PBMC_LEN 0x6C
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_pbmc = {
|
|
|
- .id = MLXSW_REG_PBMC_ID,
|
|
|
- .len = MLXSW_REG_PBMC_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(pbmc, MLXSW_REG_PBMC_ID, MLXSW_REG_PBMC_LEN);
|
|
|
|
|
|
/* reg_pbmc_local_port
|
|
|
* Local port number.
|
|
@@ -2978,10 +2887,7 @@ static inline void mlxsw_reg_pbmc_lossless_buffer_pack(char *payload,
|
|
|
#define MLXSW_REG_PSPA_ID 0x500D
|
|
|
#define MLXSW_REG_PSPA_LEN 0x8
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_pspa = {
|
|
|
- .id = MLXSW_REG_PSPA_ID,
|
|
|
- .len = MLXSW_REG_PSPA_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(pspa, MLXSW_REG_PSPA_ID, MLXSW_REG_PSPA_LEN);
|
|
|
|
|
|
/* reg_pspa_swid
|
|
|
* Switch partition ID.
|
|
@@ -3017,10 +2923,7 @@ static inline void mlxsw_reg_pspa_pack(char *payload, u8 swid, u8 local_port)
|
|
|
#define MLXSW_REG_HTGT_ID 0x7002
|
|
|
#define MLXSW_REG_HTGT_LEN 0x100
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_htgt = {
|
|
|
- .id = MLXSW_REG_HTGT_ID,
|
|
|
- .len = MLXSW_REG_HTGT_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(htgt, MLXSW_REG_HTGT_ID, MLXSW_REG_HTGT_LEN);
|
|
|
|
|
|
/* reg_htgt_swid
|
|
|
* Switch partition ID.
|
|
@@ -3154,10 +3057,7 @@ static inline void mlxsw_reg_htgt_pack(char *payload,
|
|
|
#define MLXSW_REG_HPKT_ID 0x7003
|
|
|
#define MLXSW_REG_HPKT_LEN 0x10
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_hpkt = {
|
|
|
- .id = MLXSW_REG_HPKT_ID,
|
|
|
- .len = MLXSW_REG_HPKT_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(hpkt, MLXSW_REG_HPKT_ID, MLXSW_REG_HPKT_LEN);
|
|
|
|
|
|
enum {
|
|
|
MLXSW_REG_HPKT_ACK_NOT_REQUIRED,
|
|
@@ -3256,10 +3156,7 @@ static inline void mlxsw_reg_hpkt_pack(char *payload, u8 action, u16 trap_id)
|
|
|
#define MLXSW_REG_RGCR_ID 0x8001
|
|
|
#define MLXSW_REG_RGCR_LEN 0x28
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_rgcr = {
|
|
|
- .id = MLXSW_REG_RGCR_ID,
|
|
|
- .len = MLXSW_REG_RGCR_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(rgcr, MLXSW_REG_RGCR_ID, MLXSW_REG_RGCR_LEN);
|
|
|
|
|
|
/* reg_rgcr_ipv4_en
|
|
|
* IPv4 router enable.
|
|
@@ -3330,10 +3227,7 @@ static inline void mlxsw_reg_rgcr_pack(char *payload, bool ipv4_en)
|
|
|
#define MLXSW_REG_RITR_ID 0x8002
|
|
|
#define MLXSW_REG_RITR_LEN 0x40
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_ritr = {
|
|
|
- .id = MLXSW_REG_RITR_ID,
|
|
|
- .len = MLXSW_REG_RITR_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(ritr, MLXSW_REG_RITR_ID, MLXSW_REG_RITR_LEN);
|
|
|
|
|
|
/* reg_ritr_enable
|
|
|
* Enables routing on the router interface.
|
|
@@ -3533,10 +3427,7 @@ static inline void mlxsw_reg_ritr_pack(char *payload, bool enable,
|
|
|
#define MLXSW_REG_RATR_ID 0x8008
|
|
|
#define MLXSW_REG_RATR_LEN 0x2C
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_ratr = {
|
|
|
- .id = MLXSW_REG_RATR_ID,
|
|
|
- .len = MLXSW_REG_RATR_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(ratr, MLXSW_REG_RATR_ID, MLXSW_REG_RATR_LEN);
|
|
|
|
|
|
enum mlxsw_reg_ratr_op {
|
|
|
/* Read */
|
|
@@ -3663,10 +3554,7 @@ static inline void mlxsw_reg_ratr_eth_entry_pack(char *payload,
|
|
|
#define MLXSW_REG_RALTA_ID 0x8010
|
|
|
#define MLXSW_REG_RALTA_LEN 0x04
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_ralta = {
|
|
|
- .id = MLXSW_REG_RALTA_ID,
|
|
|
- .len = MLXSW_REG_RALTA_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(ralta, MLXSW_REG_RALTA_ID, MLXSW_REG_RALTA_LEN);
|
|
|
|
|
|
/* reg_ralta_op
|
|
|
* opcode (valid for Write, must be 0 on Read)
|
|
@@ -3718,10 +3606,7 @@ static inline void mlxsw_reg_ralta_pack(char *payload, bool alloc,
|
|
|
#define MLXSW_REG_RALST_ID 0x8011
|
|
|
#define MLXSW_REG_RALST_LEN 0x104
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_ralst = {
|
|
|
- .id = MLXSW_REG_RALST_ID,
|
|
|
- .len = MLXSW_REG_RALST_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(ralst, MLXSW_REG_RALST_ID, MLXSW_REG_RALST_LEN);
|
|
|
|
|
|
/* reg_ralst_root_bin
|
|
|
* The bin number of the root bin.
|
|
@@ -3788,10 +3673,7 @@ static inline void mlxsw_reg_ralst_bin_pack(char *payload, u8 bin_number,
|
|
|
#define MLXSW_REG_RALTB_ID 0x8012
|
|
|
#define MLXSW_REG_RALTB_LEN 0x04
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_raltb = {
|
|
|
- .id = MLXSW_REG_RALTB_ID,
|
|
|
- .len = MLXSW_REG_RALTB_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(raltb, MLXSW_REG_RALTB_ID, MLXSW_REG_RALTB_LEN);
|
|
|
|
|
|
/* reg_raltb_virtual_router
|
|
|
* Virtual Router ID
|
|
@@ -3832,10 +3714,7 @@ static inline void mlxsw_reg_raltb_pack(char *payload, u16 virtual_router,
|
|
|
#define MLXSW_REG_RALUE_ID 0x8013
|
|
|
#define MLXSW_REG_RALUE_LEN 0x38
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_ralue = {
|
|
|
- .id = MLXSW_REG_RALUE_ID,
|
|
|
- .len = MLXSW_REG_RALUE_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(ralue, MLXSW_REG_RALUE_ID, MLXSW_REG_RALUE_LEN);
|
|
|
|
|
|
/* reg_ralue_protocol
|
|
|
* Protocol.
|
|
@@ -4095,10 +3974,7 @@ mlxsw_reg_ralue_act_ip2me_pack(char *payload)
|
|
|
#define MLXSW_REG_RAUHT_ID 0x8014
|
|
|
#define MLXSW_REG_RAUHT_LEN 0x74
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_rauht = {
|
|
|
- .id = MLXSW_REG_RAUHT_ID,
|
|
|
- .len = MLXSW_REG_RAUHT_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(rauht, MLXSW_REG_RAUHT_ID, MLXSW_REG_RAUHT_LEN);
|
|
|
|
|
|
enum mlxsw_reg_rauht_type {
|
|
|
MLXSW_REG_RAUHT_TYPE_IPV4,
|
|
@@ -4234,10 +4110,7 @@ static inline void mlxsw_reg_rauht_pack4(char *payload,
|
|
|
#define MLXSW_REG_RALEU_ID 0x8015
|
|
|
#define MLXSW_REG_RALEU_LEN 0x28
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_raleu = {
|
|
|
- .id = MLXSW_REG_RALEU_ID,
|
|
|
- .len = MLXSW_REG_RALEU_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(raleu, MLXSW_REG_RALEU_ID, MLXSW_REG_RALEU_LEN);
|
|
|
|
|
|
/* reg_raleu_protocol
|
|
|
* Protocol.
|
|
@@ -4309,10 +4182,7 @@ static inline void mlxsw_reg_raleu_pack(char *payload,
|
|
|
MLXSW_REG_RAUHTD_REC_MAX_NUM * MLXSW_REG_RAUHTD_REC_LEN)
|
|
|
#define MLXSW_REG_RAUHTD_IPV4_ENT_PER_REC 4
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_rauhtd = {
|
|
|
- .id = MLXSW_REG_RAUHTD_ID,
|
|
|
- .len = MLXSW_REG_RAUHTD_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(rauhtd, MLXSW_REG_RAUHTD_ID, MLXSW_REG_RAUHTD_LEN);
|
|
|
|
|
|
#define MLXSW_REG_RAUHTD_FILTER_A BIT(0)
|
|
|
#define MLXSW_REG_RAUHTD_FILTER_RIF BIT(3)
|
|
@@ -4444,10 +4314,7 @@ static inline void mlxsw_reg_rauhtd_ent_ipv4_unpack(char *payload,
|
|
|
#define MLXSW_REG_MFCR_ID 0x9001
|
|
|
#define MLXSW_REG_MFCR_LEN 0x08
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_mfcr = {
|
|
|
- .id = MLXSW_REG_MFCR_ID,
|
|
|
- .len = MLXSW_REG_MFCR_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(mfcr, MLXSW_REG_MFCR_ID, MLXSW_REG_MFCR_LEN);
|
|
|
|
|
|
enum mlxsw_reg_mfcr_pwm_frequency {
|
|
|
MLXSW_REG_MFCR_PWM_FEQ_11HZ = 0x00,
|
|
@@ -4507,10 +4374,7 @@ mlxsw_reg_mfcr_unpack(char *payload,
|
|
|
#define MLXSW_REG_MFSC_ID 0x9002
|
|
|
#define MLXSW_REG_MFSC_LEN 0x08
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_mfsc = {
|
|
|
- .id = MLXSW_REG_MFSC_ID,
|
|
|
- .len = MLXSW_REG_MFSC_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(mfsc, MLXSW_REG_MFSC_ID, MLXSW_REG_MFSC_LEN);
|
|
|
|
|
|
/* reg_mfsc_pwm
|
|
|
* Fan pwm to control / monitor.
|
|
@@ -4541,10 +4405,7 @@ static inline void mlxsw_reg_mfsc_pack(char *payload, u8 pwm,
|
|
|
#define MLXSW_REG_MFSM_ID 0x9003
|
|
|
#define MLXSW_REG_MFSM_LEN 0x08
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_mfsm = {
|
|
|
- .id = MLXSW_REG_MFSM_ID,
|
|
|
- .len = MLXSW_REG_MFSM_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(mfsm, MLXSW_REG_MFSM_ID, MLXSW_REG_MFSM_LEN);
|
|
|
|
|
|
/* reg_mfsm_tacho
|
|
|
* Fan tachometer index.
|
|
@@ -4572,10 +4433,7 @@ static inline void mlxsw_reg_mfsm_pack(char *payload, u8 tacho)
|
|
|
#define MLXSW_REG_MTCAP_ID 0x9009
|
|
|
#define MLXSW_REG_MTCAP_LEN 0x08
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_mtcap = {
|
|
|
- .id = MLXSW_REG_MTCAP_ID,
|
|
|
- .len = MLXSW_REG_MTCAP_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(mtcap, MLXSW_REG_MTCAP_ID, MLXSW_REG_MTCAP_LEN);
|
|
|
|
|
|
/* reg_mtcap_sensor_count
|
|
|
* Number of sensors supported by the device.
|
|
@@ -4593,10 +4451,7 @@ MLXSW_ITEM32(reg, mtcap, sensor_count, 0x00, 0, 7);
|
|
|
#define MLXSW_REG_MTMP_ID 0x900A
|
|
|
#define MLXSW_REG_MTMP_LEN 0x20
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_mtmp = {
|
|
|
- .id = MLXSW_REG_MTMP_ID,
|
|
|
- .len = MLXSW_REG_MTMP_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(mtmp, MLXSW_REG_MTMP_ID, MLXSW_REG_MTMP_LEN);
|
|
|
|
|
|
/* reg_mtmp_sensor_index
|
|
|
* Sensors index to access.
|
|
@@ -4679,10 +4534,7 @@ static inline void mlxsw_reg_mtmp_unpack(char *payload, unsigned int *p_temp,
|
|
|
#define MLXSW_REG_MPAT_ID 0x901A
|
|
|
#define MLXSW_REG_MPAT_LEN 0x78
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_mpat = {
|
|
|
- .id = MLXSW_REG_MPAT_ID,
|
|
|
- .len = MLXSW_REG_MPAT_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(mpat, MLXSW_REG_MPAT_ID, MLXSW_REG_MPAT_LEN);
|
|
|
|
|
|
/* reg_mpat_pa_id
|
|
|
* Port Analyzer ID.
|
|
@@ -4742,10 +4594,7 @@ static inline void mlxsw_reg_mpat_pack(char *payload, u8 pa_id,
|
|
|
#define MLXSW_REG_MPAR_ID 0x901B
|
|
|
#define MLXSW_REG_MPAR_LEN 0x08
|
|
|
|
|
|
-static const struct mlxsw_reg_info mlxsw_reg_mpar = {
|
|
|
- .id = MLXSW_REG_MPAR_ID,
|
|
|
- .len = MLXSW_REG_MPAR_LEN,
|
|
|
-};
|
|
|
+MLXSW_REG_DEFINE(mpar, MLXSW_REG_MPAR_ID, MLXSW_REG_MPAR_LEN);
|
|
|
|
|
|
/* reg_mpar_local_port
|
|
|
* The local port to mirror the packets from.
|
|
@@ -4795,10 +4644,7 @@ static inline void mlxsw_reg_mpar_pack(char *payload, u8 local_port,
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#define MLXSW_REG_MLCR_ID 0x902B
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#define MLXSW_REG_MLCR_LEN 0x0C
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-static const struct mlxsw_reg_info mlxsw_reg_mlcr = {
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- .id = MLXSW_REG_MLCR_ID,
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- .len = MLXSW_REG_MLCR_LEN,
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-};
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+MLXSW_REG_DEFINE(mlcr, MLXSW_REG_MLCR_ID, MLXSW_REG_MLCR_LEN);
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/* reg_mlcr_local_port
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* Local port number.
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@@ -4839,10 +4685,7 @@ static inline void mlxsw_reg_mlcr_pack(char *payload, u8 local_port,
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#define MLXSW_REG_SBPR_ID 0xB001
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#define MLXSW_REG_SBPR_LEN 0x14
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-static const struct mlxsw_reg_info mlxsw_reg_sbpr = {
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- .id = MLXSW_REG_SBPR_ID,
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- .len = MLXSW_REG_SBPR_LEN,
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-};
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+MLXSW_REG_DEFINE(sbpr, MLXSW_REG_SBPR_ID, MLXSW_REG_SBPR_LEN);
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/* shared direstion enum for SBPR, SBCM, SBPM */
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enum mlxsw_reg_sbxx_dir {
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@@ -4899,10 +4742,7 @@ static inline void mlxsw_reg_sbpr_pack(char *payload, u8 pool,
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#define MLXSW_REG_SBCM_ID 0xB002
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#define MLXSW_REG_SBCM_LEN 0x28
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-static const struct mlxsw_reg_info mlxsw_reg_sbcm = {
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- .id = MLXSW_REG_SBCM_ID,
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- .len = MLXSW_REG_SBCM_LEN,
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-};
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+MLXSW_REG_DEFINE(sbcm, MLXSW_REG_SBCM_ID, MLXSW_REG_SBCM_LEN);
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/* reg_sbcm_local_port
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* Local port number.
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@@ -4979,10 +4819,7 @@ static inline void mlxsw_reg_sbcm_pack(char *payload, u8 local_port, u8 pg_buff,
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#define MLXSW_REG_SBPM_ID 0xB003
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#define MLXSW_REG_SBPM_LEN 0x28
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-static const struct mlxsw_reg_info mlxsw_reg_sbpm = {
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- .id = MLXSW_REG_SBPM_ID,
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- .len = MLXSW_REG_SBPM_LEN,
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-};
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+MLXSW_REG_DEFINE(sbpm, MLXSW_REG_SBPM_ID, MLXSW_REG_SBPM_LEN);
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/* reg_sbpm_local_port
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* Local port number.
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@@ -5073,10 +4910,7 @@ static inline void mlxsw_reg_sbpm_unpack(char *payload, u32 *p_buff_occupancy,
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#define MLXSW_REG_SBMM_ID 0xB004
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#define MLXSW_REG_SBMM_LEN 0x28
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-static const struct mlxsw_reg_info mlxsw_reg_sbmm = {
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- .id = MLXSW_REG_SBMM_ID,
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- .len = MLXSW_REG_SBMM_LEN,
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-};
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+MLXSW_REG_DEFINE(sbmm, MLXSW_REG_SBMM_ID, MLXSW_REG_SBMM_LEN);
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/* reg_sbmm_prio
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* Switch Priority.
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@@ -5135,10 +4969,7 @@ static inline void mlxsw_reg_sbmm_pack(char *payload, u8 prio, u32 min_buff,
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MLXSW_REG_SBSR_REC_LEN * \
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MLXSW_REG_SBSR_REC_MAX_COUNT)
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-static const struct mlxsw_reg_info mlxsw_reg_sbsr = {
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- .id = MLXSW_REG_SBSR_ID,
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- .len = MLXSW_REG_SBSR_LEN,
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-};
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+MLXSW_REG_DEFINE(sbsr, MLXSW_REG_SBSR_ID, MLXSW_REG_SBSR_LEN);
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/* reg_sbsr_clr
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* Clear Max Buffer Occupancy. When this bit is set, the max_buff_occupancy
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@@ -5228,10 +5059,7 @@ static inline void mlxsw_reg_sbsr_rec_unpack(char *payload, int rec_index,
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#define MLXSW_REG_SBIB_ID 0xB006
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#define MLXSW_REG_SBIB_LEN 0x10
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-static const struct mlxsw_reg_info mlxsw_reg_sbib = {
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- .id = MLXSW_REG_SBIB_ID,
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- .len = MLXSW_REG_SBIB_LEN,
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-};
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+MLXSW_REG_DEFINE(sbib, MLXSW_REG_SBIB_ID, MLXSW_REG_SBIB_LEN);
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/* reg_sbib_local_port
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* Local port number
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@@ -5256,132 +5084,80 @@ static inline void mlxsw_reg_sbib_pack(char *payload, u8 local_port,
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mlxsw_reg_sbib_buff_size_set(payload, buff_size);
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}
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+static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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+ MLXSW_REG(sgcr),
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+ MLXSW_REG(spad),
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+ MLXSW_REG(smid),
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+ MLXSW_REG(sspr),
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+ MLXSW_REG(sfdat),
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+ MLXSW_REG(sfd),
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+ MLXSW_REG(sfn),
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+ MLXSW_REG(spms),
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+ MLXSW_REG(spvid),
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+ MLXSW_REG(spvm),
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+ MLXSW_REG(spaft),
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+ MLXSW_REG(sfgc),
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+ MLXSW_REG(sftr),
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+ MLXSW_REG(sfdf),
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+ MLXSW_REG(sldr),
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+ MLXSW_REG(slcr),
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+ MLXSW_REG(slcor),
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+ MLXSW_REG(spmlr),
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+ MLXSW_REG(svfa),
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+ MLXSW_REG(svpe),
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+ MLXSW_REG(sfmr),
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+ MLXSW_REG(spvmlr),
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+ MLXSW_REG(qtct),
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+ MLXSW_REG(qeec),
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+ MLXSW_REG(pmlp),
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+ MLXSW_REG(pmtu),
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+ MLXSW_REG(ptys),
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+ MLXSW_REG(ppad),
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+ MLXSW_REG(paos),
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+ MLXSW_REG(pfcc),
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+ MLXSW_REG(ppcnt),
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+ MLXSW_REG(pptb),
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+ MLXSW_REG(pbmc),
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+ MLXSW_REG(pspa),
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+ MLXSW_REG(htgt),
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+ MLXSW_REG(hpkt),
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+ MLXSW_REG(rgcr),
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+ MLXSW_REG(ritr),
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+ MLXSW_REG(ratr),
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+ MLXSW_REG(ralta),
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+ MLXSW_REG(ralst),
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+ MLXSW_REG(raltb),
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+ MLXSW_REG(ralue),
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+ MLXSW_REG(rauht),
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+ MLXSW_REG(raleu),
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+ MLXSW_REG(rauhtd),
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+ MLXSW_REG(mfcr),
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+ MLXSW_REG(mfsc),
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+ MLXSW_REG(mfsm),
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+ MLXSW_REG(mtcap),
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+ MLXSW_REG(mtmp),
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+ MLXSW_REG(mpat),
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+ MLXSW_REG(mpar),
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+ MLXSW_REG(mlcr),
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+ MLXSW_REG(sbpr),
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+ MLXSW_REG(sbcm),
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+ MLXSW_REG(sbpm),
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+ MLXSW_REG(sbmm),
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+ MLXSW_REG(sbsr),
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+ MLXSW_REG(sbib),
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+};
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+
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static inline const char *mlxsw_reg_id_str(u16 reg_id)
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{
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- switch (reg_id) {
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- case MLXSW_REG_SGCR_ID:
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- return "SGCR";
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- case MLXSW_REG_SPAD_ID:
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- return "SPAD";
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- case MLXSW_REG_SMID_ID:
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- return "SMID";
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- case MLXSW_REG_SSPR_ID:
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- return "SSPR";
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- case MLXSW_REG_SFDAT_ID:
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- return "SFDAT";
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- case MLXSW_REG_SFD_ID:
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- return "SFD";
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- case MLXSW_REG_SFN_ID:
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- return "SFN";
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- case MLXSW_REG_SPMS_ID:
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- return "SPMS";
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- case MLXSW_REG_SPVID_ID:
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- return "SPVID";
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- case MLXSW_REG_SPVM_ID:
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- return "SPVM";
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- case MLXSW_REG_SPAFT_ID:
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- return "SPAFT";
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- case MLXSW_REG_SFGC_ID:
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- return "SFGC";
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- case MLXSW_REG_SFTR_ID:
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- return "SFTR";
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- case MLXSW_REG_SFDF_ID:
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- return "SFDF";
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- case MLXSW_REG_SLDR_ID:
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- return "SLDR";
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- case MLXSW_REG_SLCR_ID:
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- return "SLCR";
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- case MLXSW_REG_SLCOR_ID:
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- return "SLCOR";
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- case MLXSW_REG_SPMLR_ID:
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- return "SPMLR";
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- case MLXSW_REG_SVFA_ID:
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- return "SVFA";
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- case MLXSW_REG_SVPE_ID:
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- return "SVPE";
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- case MLXSW_REG_SFMR_ID:
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- return "SFMR";
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- case MLXSW_REG_SPVMLR_ID:
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- return "SPVMLR";
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- case MLXSW_REG_QTCT_ID:
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- return "QTCT";
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- case MLXSW_REG_QEEC_ID:
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- return "QEEC";
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- case MLXSW_REG_PMLP_ID:
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- return "PMLP";
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- case MLXSW_REG_PMTU_ID:
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- return "PMTU";
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- case MLXSW_REG_PTYS_ID:
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- return "PTYS";
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- case MLXSW_REG_PPAD_ID:
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- return "PPAD";
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- case MLXSW_REG_PAOS_ID:
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- return "PAOS";
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- case MLXSW_REG_PFCC_ID:
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- return "PFCC";
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- case MLXSW_REG_PPCNT_ID:
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- return "PPCNT";
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- case MLXSW_REG_PPTB_ID:
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- return "PPTB";
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- case MLXSW_REG_PBMC_ID:
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- return "PBMC";
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- case MLXSW_REG_PSPA_ID:
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- return "PSPA";
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- case MLXSW_REG_HTGT_ID:
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- return "HTGT";
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- case MLXSW_REG_HPKT_ID:
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- return "HPKT";
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- case MLXSW_REG_RGCR_ID:
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- return "RGCR";
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- case MLXSW_REG_RITR_ID:
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- return "RITR";
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- case MLXSW_REG_RATR_ID:
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- return "RATR";
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- case MLXSW_REG_RALTA_ID:
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- return "RALTA";
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- case MLXSW_REG_RALST_ID:
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- return "RALST";
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- case MLXSW_REG_RALTB_ID:
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- return "RALTB";
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- case MLXSW_REG_RALUE_ID:
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- return "RALUE";
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- case MLXSW_REG_RAUHT_ID:
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- return "RAUHT";
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- case MLXSW_REG_RALEU_ID:
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- return "RALEU";
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- case MLXSW_REG_RAUHTD_ID:
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- return "RAUHTD";
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- case MLXSW_REG_MFCR_ID:
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- return "MFCR";
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- case MLXSW_REG_MFSC_ID:
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- return "MFSC";
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- case MLXSW_REG_MFSM_ID:
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- return "MFSM";
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- case MLXSW_REG_MTCAP_ID:
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- return "MTCAP";
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- case MLXSW_REG_MPAT_ID:
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- return "MPAT";
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- case MLXSW_REG_MPAR_ID:
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- return "MPAR";
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- case MLXSW_REG_MTMP_ID:
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- return "MTMP";
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- case MLXSW_REG_MLCR_ID:
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- return "MLCR";
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- case MLXSW_REG_SBPR_ID:
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- return "SBPR";
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- case MLXSW_REG_SBCM_ID:
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- return "SBCM";
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- case MLXSW_REG_SBPM_ID:
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- return "SBPM";
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- case MLXSW_REG_SBMM_ID:
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- return "SBMM";
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- case MLXSW_REG_SBSR_ID:
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- return "SBSR";
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- case MLXSW_REG_SBIB_ID:
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- return "SBIB";
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- default:
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- return "*UNKNOWN*";
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+ const struct mlxsw_reg_info *reg_info;
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(mlxsw_reg_infos); i++) {
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+ reg_info = mlxsw_reg_infos[i];
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+ if (reg_info->id == reg_id)
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+ return reg_info->name;
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}
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+ return "*UNKNOWN*";
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}
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/* PUDE - Port Up / Down Event
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