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@@ -118,7 +118,6 @@ static void ironlake_pfit_enable(struct intel_crtc *crtc);
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static void intel_modeset_setup_hw_state(struct drm_device *dev);
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static void intel_pre_disable_primary_noatomic(struct drm_crtc *crtc);
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-typedef struct intel_limit intel_limit_t;
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struct intel_limit {
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struct {
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int min, max;
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@@ -253,7 +252,7 @@ intel_fdi_link_freq(struct drm_i915_private *dev_priv,
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return 270000;
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}
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-static const intel_limit_t intel_limits_i8xx_dac = {
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+static const struct intel_limit intel_limits_i8xx_dac = {
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.dot = { .min = 25000, .max = 350000 },
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.vco = { .min = 908000, .max = 1512000 },
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.n = { .min = 2, .max = 16 },
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@@ -266,7 +265,7 @@ static const intel_limit_t intel_limits_i8xx_dac = {
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.p2_slow = 4, .p2_fast = 2 },
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};
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-static const intel_limit_t intel_limits_i8xx_dvo = {
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+static const struct intel_limit intel_limits_i8xx_dvo = {
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.dot = { .min = 25000, .max = 350000 },
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.vco = { .min = 908000, .max = 1512000 },
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.n = { .min = 2, .max = 16 },
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@@ -279,7 +278,7 @@ static const intel_limit_t intel_limits_i8xx_dvo = {
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.p2_slow = 4, .p2_fast = 4 },
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};
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-static const intel_limit_t intel_limits_i8xx_lvds = {
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+static const struct intel_limit intel_limits_i8xx_lvds = {
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.dot = { .min = 25000, .max = 350000 },
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.vco = { .min = 908000, .max = 1512000 },
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.n = { .min = 2, .max = 16 },
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@@ -292,7 +291,7 @@ static const intel_limit_t intel_limits_i8xx_lvds = {
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.p2_slow = 14, .p2_fast = 7 },
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};
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-static const intel_limit_t intel_limits_i9xx_sdvo = {
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+static const struct intel_limit intel_limits_i9xx_sdvo = {
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.dot = { .min = 20000, .max = 400000 },
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.vco = { .min = 1400000, .max = 2800000 },
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.n = { .min = 1, .max = 6 },
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@@ -305,7 +304,7 @@ static const intel_limit_t intel_limits_i9xx_sdvo = {
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.p2_slow = 10, .p2_fast = 5 },
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};
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-static const intel_limit_t intel_limits_i9xx_lvds = {
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+static const struct intel_limit intel_limits_i9xx_lvds = {
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.dot = { .min = 20000, .max = 400000 },
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.vco = { .min = 1400000, .max = 2800000 },
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.n = { .min = 1, .max = 6 },
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@@ -319,7 +318,7 @@ static const intel_limit_t intel_limits_i9xx_lvds = {
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};
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-static const intel_limit_t intel_limits_g4x_sdvo = {
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+static const struct intel_limit intel_limits_g4x_sdvo = {
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.dot = { .min = 25000, .max = 270000 },
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.vco = { .min = 1750000, .max = 3500000},
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.n = { .min = 1, .max = 4 },
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@@ -334,7 +333,7 @@ static const intel_limit_t intel_limits_g4x_sdvo = {
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},
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};
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-static const intel_limit_t intel_limits_g4x_hdmi = {
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+static const struct intel_limit intel_limits_g4x_hdmi = {
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.dot = { .min = 22000, .max = 400000 },
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.vco = { .min = 1750000, .max = 3500000},
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.n = { .min = 1, .max = 4 },
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@@ -347,7 +346,7 @@ static const intel_limit_t intel_limits_g4x_hdmi = {
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.p2_slow = 10, .p2_fast = 5 },
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};
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-static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
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+static const struct intel_limit intel_limits_g4x_single_channel_lvds = {
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.dot = { .min = 20000, .max = 115000 },
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.vco = { .min = 1750000, .max = 3500000 },
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.n = { .min = 1, .max = 3 },
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@@ -361,7 +360,7 @@ static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
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},
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};
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-static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
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+static const struct intel_limit intel_limits_g4x_dual_channel_lvds = {
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.dot = { .min = 80000, .max = 224000 },
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.vco = { .min = 1750000, .max = 3500000 },
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.n = { .min = 1, .max = 3 },
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@@ -375,7 +374,7 @@ static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
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},
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};
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-static const intel_limit_t intel_limits_pineview_sdvo = {
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+static const struct intel_limit intel_limits_pineview_sdvo = {
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.dot = { .min = 20000, .max = 400000},
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.vco = { .min = 1700000, .max = 3500000 },
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/* Pineview's Ncounter is a ring counter */
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@@ -390,7 +389,7 @@ static const intel_limit_t intel_limits_pineview_sdvo = {
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.p2_slow = 10, .p2_fast = 5 },
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};
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-static const intel_limit_t intel_limits_pineview_lvds = {
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+static const struct intel_limit intel_limits_pineview_lvds = {
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.dot = { .min = 20000, .max = 400000 },
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.vco = { .min = 1700000, .max = 3500000 },
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.n = { .min = 3, .max = 6 },
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@@ -408,7 +407,7 @@ static const intel_limit_t intel_limits_pineview_lvds = {
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* We calculate clock using (register_value + 2) for N/M1/M2, so here
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* the range value for them is (actual_value - 2).
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*/
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-static const intel_limit_t intel_limits_ironlake_dac = {
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+static const struct intel_limit intel_limits_ironlake_dac = {
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.dot = { .min = 25000, .max = 350000 },
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.vco = { .min = 1760000, .max = 3510000 },
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.n = { .min = 1, .max = 5 },
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@@ -421,7 +420,7 @@ static const intel_limit_t intel_limits_ironlake_dac = {
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.p2_slow = 10, .p2_fast = 5 },
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};
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-static const intel_limit_t intel_limits_ironlake_single_lvds = {
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+static const struct intel_limit intel_limits_ironlake_single_lvds = {
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.dot = { .min = 25000, .max = 350000 },
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.vco = { .min = 1760000, .max = 3510000 },
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.n = { .min = 1, .max = 3 },
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@@ -434,7 +433,7 @@ static const intel_limit_t intel_limits_ironlake_single_lvds = {
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.p2_slow = 14, .p2_fast = 14 },
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};
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-static const intel_limit_t intel_limits_ironlake_dual_lvds = {
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+static const struct intel_limit intel_limits_ironlake_dual_lvds = {
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.dot = { .min = 25000, .max = 350000 },
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.vco = { .min = 1760000, .max = 3510000 },
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.n = { .min = 1, .max = 3 },
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@@ -448,7 +447,7 @@ static const intel_limit_t intel_limits_ironlake_dual_lvds = {
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};
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/* LVDS 100mhz refclk limits. */
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-static const intel_limit_t intel_limits_ironlake_single_lvds_100m = {
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+static const struct intel_limit intel_limits_ironlake_single_lvds_100m = {
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.dot = { .min = 25000, .max = 350000 },
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.vco = { .min = 1760000, .max = 3510000 },
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.n = { .min = 1, .max = 2 },
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@@ -461,7 +460,7 @@ static const intel_limit_t intel_limits_ironlake_single_lvds_100m = {
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.p2_slow = 14, .p2_fast = 14 },
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};
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-static const intel_limit_t intel_limits_ironlake_dual_lvds_100m = {
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+static const struct intel_limit intel_limits_ironlake_dual_lvds_100m = {
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.dot = { .min = 25000, .max = 350000 },
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.vco = { .min = 1760000, .max = 3510000 },
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.n = { .min = 1, .max = 3 },
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@@ -474,7 +473,7 @@ static const intel_limit_t intel_limits_ironlake_dual_lvds_100m = {
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.p2_slow = 7, .p2_fast = 7 },
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};
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-static const intel_limit_t intel_limits_vlv = {
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+static const struct intel_limit intel_limits_vlv = {
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/*
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* These are the data rate limits (measured in fast clocks)
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* since those are the strictest limits we have. The fast
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@@ -490,7 +489,7 @@ static const intel_limit_t intel_limits_vlv = {
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.p2 = { .p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
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};
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-static const intel_limit_t intel_limits_chv = {
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+static const struct intel_limit intel_limits_chv = {
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/*
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* These are the data rate limits (measured in fast clocks)
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* since those are the strictest limits we have. The fast
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@@ -506,7 +505,7 @@ static const intel_limit_t intel_limits_chv = {
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.p2 = { .p2_slow = 1, .p2_fast = 14 },
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};
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-static const intel_limit_t intel_limits_bxt = {
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+static const struct intel_limit intel_limits_bxt = {
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/* FIXME: find real dot limits */
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.dot = { .min = 0, .max = INT_MAX },
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.vco = { .min = 4800000, .max = 6700000 },
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@@ -640,7 +639,7 @@ int chv_calc_dpll_params(int refclk, struct dpll *clock)
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*/
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static bool intel_PLL_is_valid(struct drm_device *dev,
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- const intel_limit_t *limit,
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+ const struct intel_limit *limit,
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const struct dpll *clock)
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{
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if (clock->n < limit->n.min || limit->n.max < clock->n)
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@@ -676,7 +675,7 @@ static bool intel_PLL_is_valid(struct drm_device *dev,
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}
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static int
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-i9xx_select_p2_div(const intel_limit_t *limit,
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+i9xx_select_p2_div(const struct intel_limit *limit,
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const struct intel_crtc_state *crtc_state,
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int target)
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{
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@@ -711,7 +710,7 @@ i9xx_select_p2_div(const intel_limit_t *limit,
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* divider from @match_clock used for LVDS downclocking.
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*/
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static bool
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-i9xx_find_best_dpll(const intel_limit_t *limit,
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+i9xx_find_best_dpll(const struct intel_limit *limit,
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struct intel_crtc_state *crtc_state,
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int target, int refclk, struct dpll *match_clock,
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struct dpll *best_clock)
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@@ -768,7 +767,7 @@ i9xx_find_best_dpll(const intel_limit_t *limit,
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* divider from @match_clock used for LVDS downclocking.
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*/
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static bool
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-pnv_find_best_dpll(const intel_limit_t *limit,
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+pnv_find_best_dpll(const struct intel_limit *limit,
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struct intel_crtc_state *crtc_state,
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int target, int refclk, struct dpll *match_clock,
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struct dpll *best_clock)
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@@ -823,7 +822,7 @@ pnv_find_best_dpll(const intel_limit_t *limit,
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* divider from @match_clock used for LVDS downclocking.
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*/
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static bool
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-g4x_find_best_dpll(const intel_limit_t *limit,
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+g4x_find_best_dpll(const struct intel_limit *limit,
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struct intel_crtc_state *crtc_state,
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int target, int refclk, struct dpll *match_clock,
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struct dpll *best_clock)
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@@ -916,7 +915,7 @@ static bool vlv_PLL_is_optimal(struct drm_device *dev, int target_freq,
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* reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
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*/
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static bool
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-vlv_find_best_dpll(const intel_limit_t *limit,
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+vlv_find_best_dpll(const struct intel_limit *limit,
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struct intel_crtc_state *crtc_state,
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int target, int refclk, struct dpll *match_clock,
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struct dpll *best_clock)
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@@ -975,7 +974,7 @@ vlv_find_best_dpll(const intel_limit_t *limit,
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* reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
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*/
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static bool
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-chv_find_best_dpll(const intel_limit_t *limit,
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+chv_find_best_dpll(const struct intel_limit *limit,
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struct intel_crtc_state *crtc_state,
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int target, int refclk, struct dpll *match_clock,
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struct dpll *best_clock)
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@@ -1036,7 +1035,7 @@ bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, int target_clock,
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struct dpll *best_clock)
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{
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int refclk = 100000;
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- const intel_limit_t *limit = &intel_limits_bxt;
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+ const struct intel_limit *limit = &intel_limits_bxt;
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return chv_find_best_dpll(limit, crtc_state,
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target_clock, refclk, NULL, best_clock);
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@@ -7808,7 +7807,7 @@ static int i8xx_crtc_compute_clock(struct intel_crtc *crtc,
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{
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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- const intel_limit_t *limit;
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+ const struct intel_limit *limit;
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int refclk = 48000;
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memset(&crtc_state->dpll_hw_state, 0,
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@@ -7844,7 +7843,7 @@ static int g4x_crtc_compute_clock(struct intel_crtc *crtc,
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{
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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- const intel_limit_t *limit;
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+ const struct intel_limit *limit;
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int refclk = 96000;
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memset(&crtc_state->dpll_hw_state, 0,
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@@ -7887,7 +7886,7 @@ static int pnv_crtc_compute_clock(struct intel_crtc *crtc,
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{
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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- const intel_limit_t *limit;
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+ const struct intel_limit *limit;
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int refclk = 96000;
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memset(&crtc_state->dpll_hw_state, 0,
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@@ -7921,7 +7920,7 @@ static int i9xx_crtc_compute_clock(struct intel_crtc *crtc,
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{
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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- const intel_limit_t *limit;
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+ const struct intel_limit *limit;
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int refclk = 96000;
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memset(&crtc_state->dpll_hw_state, 0,
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@@ -7954,7 +7953,7 @@ static int chv_crtc_compute_clock(struct intel_crtc *crtc,
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struct intel_crtc_state *crtc_state)
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{
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int refclk = 100000;
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- const intel_limit_t *limit = &intel_limits_chv;
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+ const struct intel_limit *limit = &intel_limits_chv;
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memset(&crtc_state->dpll_hw_state, 0,
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sizeof(crtc_state->dpll_hw_state));
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@@ -7975,7 +7974,7 @@ static int vlv_crtc_compute_clock(struct intel_crtc *crtc,
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struct intel_crtc_state *crtc_state)
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{
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int refclk = 100000;
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- const intel_limit_t *limit = &intel_limits_vlv;
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+ const struct intel_limit *limit = &intel_limits_vlv;
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memset(&crtc_state->dpll_hw_state, 0,
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sizeof(crtc_state->dpll_hw_state));
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@@ -8896,7 +8895,7 @@ static int ironlake_crtc_compute_clock(struct intel_crtc *crtc,
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struct dpll reduced_clock;
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bool has_reduced_clock = false;
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struct intel_shared_dpll *pll;
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- const intel_limit_t *limit;
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+ const struct intel_limit *limit;
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int refclk = 120000;
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memset(&crtc_state->dpll_hw_state, 0,
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