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@@ -749,21 +749,24 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
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eeh_unfreeze_pe(pe, false);
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eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
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eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev);
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+ eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
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break;
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case pcie_hot_reset:
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+ eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
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eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
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eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
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eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
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eeh_ops->reset(pe, EEH_RESET_HOT);
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break;
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case pcie_warm_reset:
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+ eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
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eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
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eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
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eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
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eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
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break;
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default:
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- eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
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+ eeh_pe_state_clear(pe, EEH_PE_ISOLATED | EEH_PE_CFG_BLOCKED);
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return -EINVAL;
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};
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