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@@ -260,6 +260,8 @@ typedef struct _drm_i915_sarea {
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#define DRM_I915_GEM_CONTEXT_GETPARAM 0x34
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#define DRM_I915_GEM_CONTEXT_GETPARAM 0x34
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#define DRM_I915_GEM_CONTEXT_SETPARAM 0x35
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#define DRM_I915_GEM_CONTEXT_SETPARAM 0x35
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#define DRM_I915_PERF_OPEN 0x36
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#define DRM_I915_PERF_OPEN 0x36
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+#define DRM_I915_PERF_ADD_CONFIG 0x37
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+#define DRM_I915_PERF_REMOVE_CONFIG 0x38
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#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
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#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
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#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
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#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
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@@ -315,6 +317,8 @@ typedef struct _drm_i915_sarea {
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#define DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_GETPARAM, struct drm_i915_gem_context_param)
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#define DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_GETPARAM, struct drm_i915_gem_context_param)
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#define DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_SETPARAM, struct drm_i915_gem_context_param)
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#define DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_SETPARAM, struct drm_i915_gem_context_param)
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#define DRM_IOCTL_I915_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
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#define DRM_IOCTL_I915_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
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+#define DRM_IOCTL_I915_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_ADD_CONFIG, struct drm_i915_perf_oa_config)
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+#define DRM_IOCTL_I915_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_REMOVE_CONFIG, __u64)
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/* Allow drivers to submit batchbuffers directly to hardware, relying
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/* Allow drivers to submit batchbuffers directly to hardware, relying
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* on the security mechanisms provided by hardware.
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* on the security mechanisms provided by hardware.
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@@ -431,6 +435,11 @@ typedef struct drm_i915_irq_wait {
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*/
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*/
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#define I915_PARAM_HAS_EXEC_BATCH_FIRST 48
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#define I915_PARAM_HAS_EXEC_BATCH_FIRST 48
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+/* Query whether DRM_I915_GEM_EXECBUFFER2 supports supplying an array of
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+ * drm_i915_gem_exec_fence structures. See I915_EXEC_FENCE_ARRAY.
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+ */
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+#define I915_PARAM_HAS_EXEC_FENCE_ARRAY 49
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+
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typedef struct drm_i915_getparam {
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typedef struct drm_i915_getparam {
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__s32 param;
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__s32 param;
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/*
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/*
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@@ -812,6 +821,17 @@ struct drm_i915_gem_exec_object2 {
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__u64 rsvd2;
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__u64 rsvd2;
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};
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};
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+struct drm_i915_gem_exec_fence {
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+ /**
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+ * User's handle for a drm_syncobj to wait on or signal.
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+ */
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+ __u32 handle;
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+
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+#define I915_EXEC_FENCE_WAIT (1<<0)
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+#define I915_EXEC_FENCE_SIGNAL (1<<1)
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+ __u32 flags;
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+};
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+
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struct drm_i915_gem_execbuffer2 {
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struct drm_i915_gem_execbuffer2 {
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/**
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/**
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* List of gem_exec_object2 structs
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* List of gem_exec_object2 structs
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@@ -826,7 +846,11 @@ struct drm_i915_gem_execbuffer2 {
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__u32 DR1;
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__u32 DR1;
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__u32 DR4;
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__u32 DR4;
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__u32 num_cliprects;
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__u32 num_cliprects;
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- /** This is a struct drm_clip_rect *cliprects */
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+ /**
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+ * This is a struct drm_clip_rect *cliprects if I915_EXEC_FENCE_ARRAY
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+ * is not set. If I915_EXEC_FENCE_ARRAY is set, then this is a
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+ * struct drm_i915_gem_exec_fence *fences.
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+ */
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__u64 cliprects_ptr;
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__u64 cliprects_ptr;
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#define I915_EXEC_RING_MASK (7<<0)
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#define I915_EXEC_RING_MASK (7<<0)
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#define I915_EXEC_DEFAULT (0<<0)
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#define I915_EXEC_DEFAULT (0<<0)
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@@ -927,7 +951,14 @@ struct drm_i915_gem_execbuffer2 {
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* element).
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* element).
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*/
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*/
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#define I915_EXEC_BATCH_FIRST (1<<18)
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#define I915_EXEC_BATCH_FIRST (1<<18)
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-#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_BATCH_FIRST<<1))
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+
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+/* Setting I915_FENCE_ARRAY implies that num_cliprects and cliprects_ptr
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+ * define an array of i915_gem_exec_fence structures which specify a set of
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+ * dma fences to wait upon or signal.
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+ */
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+#define I915_EXEC_FENCE_ARRAY (1<<19)
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+
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+#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_ARRAY<<1))
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#define I915_EXEC_CONTEXT_ID_MASK (0xffffffff)
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#define I915_EXEC_CONTEXT_ID_MASK (0xffffffff)
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#define i915_execbuffer2_set_context_id(eb2, context) \
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#define i915_execbuffer2_set_context_id(eb2, context) \
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@@ -1467,6 +1498,22 @@ enum drm_i915_perf_record_type {
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DRM_I915_PERF_RECORD_MAX /* non-ABI */
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DRM_I915_PERF_RECORD_MAX /* non-ABI */
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};
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};
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+/**
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+ * Structure to upload perf dynamic configuration into the kernel.
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+ */
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+struct drm_i915_perf_oa_config {
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+ /** String formatted like "%08x-%04x-%04x-%04x-%012x" */
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+ char uuid[36];
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+
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+ __u32 n_mux_regs;
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+ __u32 n_boolean_regs;
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+ __u32 n_flex_regs;
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+
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+ __u64 __user mux_regs_ptr;
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+ __u64 __user boolean_regs_ptr;
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+ __u64 __user flex_regs_ptr;
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+};
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+
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#if defined(__cplusplus)
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#if defined(__cplusplus)
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}
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}
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#endif
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#endif
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