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@@ -1732,8 +1732,16 @@ void qed_int_igu_init_pure_rt_single(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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struct qed_ptt *p_ptt,
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u16 igu_sb_id, u16 opaque, bool b_set)
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u16 igu_sb_id, u16 opaque, bool b_set)
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{
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{
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+ struct qed_igu_block *p_block;
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int pi, i;
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int pi, i;
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+ p_block = &p_hwfn->hw_info.p_igu_info->entry[igu_sb_id];
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+ DP_VERBOSE(p_hwfn, NETIF_MSG_INTR,
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+ "Cleaning SB [%04x]: func_id= %d is_pf = %d vector_num = 0x%0x\n",
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+ igu_sb_id,
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+ p_block->function_id,
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+ p_block->is_pf, p_block->vector_number);
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+
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/* Set */
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/* Set */
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if (b_set)
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if (b_set)
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qed_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 1, opaque);
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qed_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 1, opaque);
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@@ -1768,33 +1776,35 @@ void qed_int_igu_init_pure_rt(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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struct qed_ptt *p_ptt,
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bool b_set, bool b_slowpath)
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bool b_set, bool b_slowpath)
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{
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{
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- u32 igu_base_sb = p_hwfn->hw_info.p_igu_info->igu_base_sb;
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- u32 igu_sb_cnt = p_hwfn->hw_info.p_igu_info->usage.cnt;
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- u32 igu_sb_id = 0, val = 0;
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+ struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
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+ struct qed_igu_block *p_block;
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+ u16 igu_sb_id = 0;
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+ u32 val = 0;
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val = qed_rd(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION);
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val = qed_rd(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION);
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val |= IGU_REG_BLOCK_CONFIGURATION_VF_CLEANUP_EN;
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val |= IGU_REG_BLOCK_CONFIGURATION_VF_CLEANUP_EN;
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val &= ~IGU_REG_BLOCK_CONFIGURATION_PXP_TPH_INTERFACE_EN;
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val &= ~IGU_REG_BLOCK_CONFIGURATION_PXP_TPH_INTERFACE_EN;
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qed_wr(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION, val);
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qed_wr(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION, val);
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- DP_VERBOSE(p_hwfn, NETIF_MSG_INTR,
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- "IGU cleaning SBs [%d,...,%d]\n",
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- igu_base_sb, igu_base_sb + igu_sb_cnt - 1);
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+ for (igu_sb_id = 0;
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+ igu_sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev); igu_sb_id++) {
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+ p_block = &p_info->entry[igu_sb_id];
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+
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+ if (!(p_block->status & QED_IGU_STATUS_VALID) ||
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+ !p_block->is_pf ||
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+ (p_block->status & QED_IGU_STATUS_DSB))
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+ continue;
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- for (igu_sb_id = igu_base_sb; igu_sb_id < igu_base_sb + igu_sb_cnt;
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- igu_sb_id++)
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qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, igu_sb_id,
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qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, igu_sb_id,
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p_hwfn->hw_info.opaque_fid,
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p_hwfn->hw_info.opaque_fid,
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b_set);
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b_set);
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+ }
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- if (!b_slowpath)
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- return;
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-
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- igu_sb_id = p_hwfn->hw_info.p_igu_info->igu_dsb_id;
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- DP_VERBOSE(p_hwfn, NETIF_MSG_INTR,
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- "IGU cleaning slowpath SB [%d]\n", igu_sb_id);
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- qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, igu_sb_id,
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- p_hwfn->hw_info.opaque_fid, b_set);
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+ if (b_slowpath)
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+ qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
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+ p_info->igu_dsb_id,
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+ p_hwfn->hw_info.opaque_fid,
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+ b_set);
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}
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}
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static void qed_int_igu_read_cam_block(struct qed_hwfn *p_hwfn,
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static void qed_int_igu_read_cam_block(struct qed_hwfn *p_hwfn,
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@@ -1810,6 +1820,7 @@ static void qed_int_igu_read_cam_block(struct qed_hwfn *p_hwfn,
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p_block->function_id = GET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER);
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p_block->function_id = GET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER);
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p_block->is_pf = GET_FIELD(val, IGU_MAPPING_LINE_PF_VALID);
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p_block->is_pf = GET_FIELD(val, IGU_MAPPING_LINE_PF_VALID);
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p_block->vector_number = GET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER);
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p_block->vector_number = GET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER);
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+ p_block->igu_sb_id = igu_sb_id;
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}
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}
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int qed_int_igu_read_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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int qed_int_igu_read_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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@@ -1825,10 +1836,6 @@ int qed_int_igu_read_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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p_igu_info = p_hwfn->hw_info.p_igu_info;
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p_igu_info = p_hwfn->hw_info.p_igu_info;
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- /* Initialize base sb / sb cnt for PFs and VFs */
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- p_igu_info->igu_base_sb = 0xffff;
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- p_igu_info->igu_base_sb_iov = 0xffff;
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-
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/* Distinguish between existent and non-existent default SB */
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/* Distinguish between existent and non-existent default SB */
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p_igu_info->igu_dsb_id = QED_SB_INVALID_IDX;
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p_igu_info->igu_dsb_id = QED_SB_INVALID_IDX;
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@@ -1852,11 +1859,8 @@ int qed_int_igu_read_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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QED_IGU_STATUS_VALID |
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QED_IGU_STATUS_VALID |
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QED_IGU_STATUS_FREE;
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QED_IGU_STATUS_FREE;
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- if (p_igu_info->igu_dsb_id != QED_SB_INVALID_IDX) {
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- if (p_igu_info->igu_base_sb == 0xffff)
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- p_igu_info->igu_base_sb = igu_sb_id;
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+ if (p_igu_info->igu_dsb_id != QED_SB_INVALID_IDX)
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p_igu_info->usage.cnt++;
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p_igu_info->usage.cnt++;
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- }
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} else if (!(p_block->is_pf) &&
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} else if (!(p_block->is_pf) &&
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(p_block->function_id >= min_vf) &&
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(p_block->function_id >= min_vf) &&
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(p_block->function_id < max_vf)) {
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(p_block->function_id < max_vf)) {
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@@ -1864,9 +1868,8 @@ int qed_int_igu_read_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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p_block->status = QED_IGU_STATUS_VALID |
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p_block->status = QED_IGU_STATUS_VALID |
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QED_IGU_STATUS_FREE;
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QED_IGU_STATUS_FREE;
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- if (p_igu_info->igu_base_sb_iov == 0xffff)
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- p_igu_info->igu_base_sb_iov = igu_sb_id;
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- p_igu_info->usage.iov_cnt++;
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+ if (p_igu_info->igu_dsb_id != QED_SB_INVALID_IDX)
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+ p_igu_info->usage.iov_cnt++;
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}
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}
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/* Mark the First entry belonging to the PF or its VFs
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/* Mark the First entry belonging to the PF or its VFs
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@@ -2006,28 +2009,6 @@ void qed_int_get_num_sbs(struct qed_hwfn *p_hwfn,
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memcpy(p_sb_cnt_info, &info->usage, sizeof(*p_sb_cnt_info));
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memcpy(p_sb_cnt_info, &info->usage, sizeof(*p_sb_cnt_info));
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}
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}
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-u16 qed_int_queue_id_from_sb_id(struct qed_hwfn *p_hwfn, u16 sb_id)
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-{
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- struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
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-
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- /* Determine origin of SB id */
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- if ((sb_id >= p_info->igu_base_sb) &&
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- (sb_id < p_info->igu_base_sb + p_info->usage.cnt)) {
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- return sb_id - p_info->igu_base_sb;
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- } else if ((sb_id >= p_info->igu_base_sb_iov) &&
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- (sb_id < p_info->igu_base_sb_iov + p_info->usage.iov_cnt)) {
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- /* We want the first VF queue to be adjacent to the
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- * last PF queue. Since L2 queues can be partial to
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- * SBs, we'll use the feature instead.
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- */
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- return sb_id - p_info->igu_base_sb_iov +
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- FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
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- } else {
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- DP_NOTICE(p_hwfn, "SB %d not in range for function\n", sb_id);
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- return 0;
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- }
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-}
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-
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void qed_int_disable_post_isr_release(struct qed_dev *cdev)
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void qed_int_disable_post_isr_release(struct qed_dev *cdev)
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{
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{
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int i;
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int i;
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