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@@ -101,10 +101,7 @@ struct rk3x_i2c {
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struct notifier_block clk_rate_nb;
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struct notifier_block clk_rate_nb;
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/* Settings */
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/* Settings */
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- unsigned int scl_frequency;
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- unsigned int scl_rise_ns;
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- unsigned int scl_fall_ns;
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- unsigned int sda_fall_ns;
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+ struct i2c_timings t;
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/* Synchronization & notification */
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/* Synchronization & notification */
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spinlock_t lock;
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spinlock_t lock;
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@@ -437,10 +434,7 @@ out:
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* Calculate divider values for desired SCL frequency
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* Calculate divider values for desired SCL frequency
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*
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*
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* @clk_rate: I2C input clock rate
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* @clk_rate: I2C input clock rate
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- * @scl_rate: Desired SCL rate
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- * @scl_rise_ns: How many ns it takes for SCL to rise.
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- * @scl_fall_ns: How many ns it takes for SCL to fall.
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- * @sda_fall_ns: How many ns it takes for SDA to fall.
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+ * @t: Known I2C timing information.
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* @div_low: Divider output for low
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* @div_low: Divider output for low
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* @div_high: Divider output for high
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* @div_high: Divider output for high
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*
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*
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@@ -448,11 +442,10 @@ out:
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* a best-effort divider value is returned in divs. If the target rate is
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* a best-effort divider value is returned in divs. If the target rate is
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* too high, we silently use the highest possible rate.
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* too high, we silently use the highest possible rate.
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*/
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*/
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-static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
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- unsigned long scl_rise_ns,
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- unsigned long scl_fall_ns,
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- unsigned long sda_fall_ns,
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- unsigned long *div_low, unsigned long *div_high)
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+static int rk3x_i2c_calc_divs(unsigned long clk_rate,
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+ struct i2c_timings *t,
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+ unsigned long *div_low,
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+ unsigned long *div_high)
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{
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{
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unsigned long spec_min_low_ns, spec_min_high_ns;
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unsigned long spec_min_low_ns, spec_min_high_ns;
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unsigned long spec_setup_start, spec_max_data_hold_ns;
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unsigned long spec_setup_start, spec_max_data_hold_ns;
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@@ -472,12 +465,12 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
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int ret = 0;
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int ret = 0;
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/* Only support standard-mode and fast-mode */
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/* Only support standard-mode and fast-mode */
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- if (WARN_ON(scl_rate > 400000))
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- scl_rate = 400000;
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+ if (WARN_ON(t->bus_freq_hz > 400000))
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+ t->bus_freq_hz = 400000;
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/* prevent scl_rate_khz from becoming 0 */
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/* prevent scl_rate_khz from becoming 0 */
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- if (WARN_ON(scl_rate < 1000))
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- scl_rate = 1000;
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+ if (WARN_ON(t->bus_freq_hz < 1000))
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+ t->bus_freq_hz = 1000;
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/*
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/*
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* min_low_ns: The minimum number of ns we need to hold low to
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* min_low_ns: The minimum number of ns we need to hold low to
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@@ -491,7 +484,7 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
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* This is because the i2c host on Rockchip holds the data line
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* This is because the i2c host on Rockchip holds the data line
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* for half the low time.
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* for half the low time.
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*/
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*/
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- if (scl_rate <= 100000) {
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+ if (t->bus_freq_hz <= 100000) {
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/* Standard-mode */
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/* Standard-mode */
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spec_min_low_ns = 4700;
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spec_min_low_ns = 4700;
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spec_setup_start = 4700;
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spec_setup_start = 4700;
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@@ -506,7 +499,7 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
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spec_max_data_hold_ns = 900;
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spec_max_data_hold_ns = 900;
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data_hold_buffer_ns = 50;
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data_hold_buffer_ns = 50;
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}
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}
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- min_high_ns = scl_rise_ns + spec_min_high_ns;
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+ min_high_ns = t->scl_rise_ns + spec_min_high_ns;
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/*
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/*
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* Timings for repeated start:
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* Timings for repeated start:
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@@ -517,18 +510,18 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
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* we meet tSU;STA and tHD;STA times.
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* we meet tSU;STA and tHD;STA times.
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*/
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*/
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min_high_ns = max(min_high_ns,
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min_high_ns = max(min_high_ns,
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- DIV_ROUND_UP((scl_rise_ns + spec_setup_start) * 1000, 875));
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+ DIV_ROUND_UP((t->scl_rise_ns + spec_setup_start) * 1000, 875));
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min_high_ns = max(min_high_ns,
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min_high_ns = max(min_high_ns,
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- DIV_ROUND_UP((scl_rise_ns + spec_setup_start +
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- sda_fall_ns + spec_min_high_ns), 2));
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+ DIV_ROUND_UP((t->scl_rise_ns + spec_setup_start +
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+ t->sda_fall_ns + spec_min_high_ns), 2));
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- min_low_ns = scl_fall_ns + spec_min_low_ns;
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+ min_low_ns = t->scl_fall_ns + spec_min_low_ns;
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max_low_ns = spec_max_data_hold_ns * 2 - data_hold_buffer_ns;
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max_low_ns = spec_max_data_hold_ns * 2 - data_hold_buffer_ns;
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min_total_ns = min_low_ns + min_high_ns;
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min_total_ns = min_low_ns + min_high_ns;
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/* Adjust to avoid overflow */
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/* Adjust to avoid overflow */
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clk_rate_khz = DIV_ROUND_UP(clk_rate, 1000);
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clk_rate_khz = DIV_ROUND_UP(clk_rate, 1000);
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- scl_rate_khz = scl_rate / 1000;
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+ scl_rate_khz = t->bus_freq_hz / 1000;
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/*
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/*
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* We need the total div to be >= this number
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* We need the total div to be >= this number
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@@ -616,14 +609,13 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
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static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate)
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static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate)
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{
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{
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+ struct i2c_timings *t = &i2c->t;
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unsigned long div_low, div_high;
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unsigned long div_low, div_high;
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u64 t_low_ns, t_high_ns;
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u64 t_low_ns, t_high_ns;
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int ret;
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int ret;
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- ret = rk3x_i2c_calc_divs(clk_rate, i2c->scl_frequency, i2c->scl_rise_ns,
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- i2c->scl_fall_ns, i2c->sda_fall_ns,
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- &div_low, &div_high);
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- WARN_ONCE(ret != 0, "Could not reach SCL freq %u", i2c->scl_frequency);
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+ ret = rk3x_i2c_calc_divs(clk_rate, t, &div_low, &div_high);
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+ WARN_ONCE(ret != 0, "Could not reach SCL freq %u", t->bus_freq_hz);
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clk_enable(i2c->clk);
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clk_enable(i2c->clk);
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i2c_writel(i2c, (div_high << 16) | (div_low & 0xffff), REG_CLKDIV);
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i2c_writel(i2c, (div_high << 16) | (div_low & 0xffff), REG_CLKDIV);
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@@ -634,7 +626,7 @@ static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate)
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dev_dbg(i2c->dev,
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dev_dbg(i2c->dev,
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"CLK %lukhz, Req %uns, Act low %lluns high %lluns\n",
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"CLK %lukhz, Req %uns, Act low %lluns high %lluns\n",
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clk_rate / 1000,
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clk_rate / 1000,
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- 1000000000 / i2c->scl_frequency,
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+ 1000000000 / t->bus_freq_hz,
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t_low_ns, t_high_ns);
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t_low_ns, t_high_ns);
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}
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}
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@@ -664,9 +656,7 @@ static int rk3x_i2c_clk_notifier_cb(struct notifier_block *nb, unsigned long
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switch (event) {
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switch (event) {
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case PRE_RATE_CHANGE:
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case PRE_RATE_CHANGE:
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- if (rk3x_i2c_calc_divs(ndata->new_rate, i2c->scl_frequency,
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- i2c->scl_rise_ns, i2c->scl_fall_ns,
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- i2c->sda_fall_ns,
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+ if (rk3x_i2c_calc_divs(ndata->new_rate, &i2c->t,
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&div_low, &div_high) != 0)
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&div_low, &div_high) != 0)
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return NOTIFY_STOP;
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return NOTIFY_STOP;
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@@ -879,37 +869,8 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
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match = of_match_node(rk3x_i2c_match, np);
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match = of_match_node(rk3x_i2c_match, np);
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i2c->soc_data = (struct rk3x_i2c_soc_data *)match->data;
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i2c->soc_data = (struct rk3x_i2c_soc_data *)match->data;
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- if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
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- &i2c->scl_frequency)) {
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- dev_info(&pdev->dev, "using default SCL frequency: %d\n",
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- DEFAULT_SCL_RATE);
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- i2c->scl_frequency = DEFAULT_SCL_RATE;
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- }
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-
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- if (i2c->scl_frequency == 0 || i2c->scl_frequency > 400 * 1000) {
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- dev_warn(&pdev->dev, "invalid SCL frequency specified.\n");
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- dev_warn(&pdev->dev, "using default SCL frequency: %d\n",
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- DEFAULT_SCL_RATE);
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- i2c->scl_frequency = DEFAULT_SCL_RATE;
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- }
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-
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- /*
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- * Read rise and fall time from device tree. If not available use
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- * the default maximum timing from the specification.
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- */
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- if (of_property_read_u32(pdev->dev.of_node, "i2c-scl-rising-time-ns",
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- &i2c->scl_rise_ns)) {
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- if (i2c->scl_frequency <= 100000)
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- i2c->scl_rise_ns = 1000;
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- else
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- i2c->scl_rise_ns = 300;
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- }
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- if (of_property_read_u32(pdev->dev.of_node, "i2c-scl-falling-time-ns",
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- &i2c->scl_fall_ns))
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- i2c->scl_fall_ns = 300;
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- if (of_property_read_u32(pdev->dev.of_node, "i2c-sda-falling-time-ns",
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- &i2c->sda_fall_ns))
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- i2c->sda_fall_ns = i2c->scl_fall_ns;
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+ /* use common interface to get I2C timing properties */
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+ i2c_parse_fw_timings(&pdev->dev, &i2c->t, true);
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strlcpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name));
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strlcpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name));
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i2c->adap.owner = THIS_MODULE;
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i2c->adap.owner = THIS_MODULE;
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