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@@ -181,6 +181,8 @@ static void alc_fix_pll(struct hda_codec *codec)
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spec->pll_coef_idx);
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spec->pll_coef_idx);
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val = snd_hda_codec_read(codec, spec->pll_nid, 0,
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val = snd_hda_codec_read(codec, spec->pll_nid, 0,
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AC_VERB_GET_PROC_COEF, 0);
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AC_VERB_GET_PROC_COEF, 0);
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+ if (val == -1)
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+ return;
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snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_COEF_INDEX,
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snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_COEF_INDEX,
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spec->pll_coef_idx);
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spec->pll_coef_idx);
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snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_PROC_COEF,
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snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_PROC_COEF,
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@@ -2806,6 +2808,8 @@ static void alc286_shutup(struct hda_codec *codec)
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static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up)
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static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up)
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{
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{
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int val = alc_read_coef_idx(codec, 0x04);
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int val = alc_read_coef_idx(codec, 0x04);
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+ if (val == -1)
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+ return;
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if (power_up)
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if (power_up)
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val |= 1 << 11;
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val |= 1 << 11;
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else
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else
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@@ -3264,6 +3268,15 @@ static int alc269_resume(struct hda_codec *codec)
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snd_hda_codec_resume_cache(codec);
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snd_hda_codec_resume_cache(codec);
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alc_inv_dmic_sync(codec, true);
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alc_inv_dmic_sync(codec, true);
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hda_call_check_power_status(codec, 0x01);
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hda_call_check_power_status(codec, 0x01);
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+
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+ /* on some machine, the BIOS will clear the codec gpio data when enter
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+ * suspend, and won't restore the data after resume, so we restore it
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+ * in the driver.
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+ */
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+ if (spec->gpio_led)
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+ snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_SET_GPIO_DATA,
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+ spec->gpio_led);
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+
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if (spec->has_alc5505_dsp)
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if (spec->has_alc5505_dsp)
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alc5505_dsp_resume(codec);
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alc5505_dsp_resume(codec);
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@@ -5311,27 +5324,30 @@ static void alc269_fill_coef(struct hda_codec *codec)
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if ((alc_get_coef0(codec) & 0x00ff) == 0x017) {
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if ((alc_get_coef0(codec) & 0x00ff) == 0x017) {
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val = alc_read_coef_idx(codec, 0x04);
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val = alc_read_coef_idx(codec, 0x04);
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/* Power up output pin */
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/* Power up output pin */
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- alc_write_coef_idx(codec, 0x04, val | (1<<11));
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+ if (val != -1)
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+ alc_write_coef_idx(codec, 0x04, val | (1<<11));
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}
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}
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if ((alc_get_coef0(codec) & 0x00ff) == 0x018) {
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if ((alc_get_coef0(codec) & 0x00ff) == 0x018) {
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val = alc_read_coef_idx(codec, 0xd);
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val = alc_read_coef_idx(codec, 0xd);
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- if ((val & 0x0c00) >> 10 != 0x1) {
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+ if (val != -1 && (val & 0x0c00) >> 10 != 0x1) {
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/* Capless ramp up clock control */
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/* Capless ramp up clock control */
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alc_write_coef_idx(codec, 0xd, val | (1<<10));
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alc_write_coef_idx(codec, 0xd, val | (1<<10));
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}
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}
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val = alc_read_coef_idx(codec, 0x17);
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val = alc_read_coef_idx(codec, 0x17);
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- if ((val & 0x01c0) >> 6 != 0x4) {
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+ if (val != -1 && (val & 0x01c0) >> 6 != 0x4) {
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/* Class D power on reset */
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/* Class D power on reset */
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alc_write_coef_idx(codec, 0x17, val | (1<<7));
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alc_write_coef_idx(codec, 0x17, val | (1<<7));
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}
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}
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}
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}
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val = alc_read_coef_idx(codec, 0xd); /* Class D */
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val = alc_read_coef_idx(codec, 0xd); /* Class D */
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- alc_write_coef_idx(codec, 0xd, val | (1<<14));
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+ if (val != -1)
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+ alc_write_coef_idx(codec, 0xd, val | (1<<14));
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val = alc_read_coef_idx(codec, 0x4); /* HP */
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val = alc_read_coef_idx(codec, 0x4); /* HP */
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- alc_write_coef_idx(codec, 0x4, val | (1<<11));
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+ if (val != -1)
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+ alc_write_coef_idx(codec, 0x4, val | (1<<11));
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}
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}
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/*
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/*
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