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@@ -56,6 +56,10 @@ MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (default: enabled)");
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int nouveau_duallink = 1;
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module_param_named(duallink, nouveau_duallink, int, 0400);
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+MODULE_PARM_DESC(hdmimhz, "Force a maximum HDMI pixel clock (in MHz)");
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+int nouveau_hdmimhz = 0;
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+module_param_named(hdmimhz, nouveau_hdmimhz, int, 0400);
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+
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struct nouveau_encoder *
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find_encoder(struct drm_connector *connector, int type)
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{
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@@ -809,12 +813,23 @@ nouveau_connector_get_modes(struct drm_connector *connector)
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}
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static unsigned
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-get_tmds_link_bandwidth(struct drm_connector *connector)
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+get_tmds_link_bandwidth(struct drm_connector *connector, bool hdmi)
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{
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struct nouveau_connector *nv_connector = nouveau_connector(connector);
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struct nouveau_drm *drm = nouveau_drm(connector->dev);
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struct dcb_output *dcb = nv_connector->detected_encoder->dcb;
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+ if (hdmi) {
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+ if (nouveau_hdmimhz > 0)
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+ return nouveau_hdmimhz * 1000;
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+ /* Note: these limits are conservative, some Fermi's
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+ * can do 297 MHz. Unclear how this can be determined.
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+ */
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+ if (drm->device.info.family >= NV_DEVICE_INFO_V0_KEPLER)
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+ return 297000;
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+ if (drm->device.info.family >= NV_DEVICE_INFO_V0_FERMI)
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+ return 225000;
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+ }
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if (dcb->location != DCB_LOC_ON_CHIP ||
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drm->device.info.chipset >= 0x46)
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return 165000;
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@@ -835,6 +850,7 @@ nouveau_connector_mode_valid(struct drm_connector *connector,
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struct drm_encoder *encoder = to_drm_encoder(nv_encoder);
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unsigned min_clock = 25000, max_clock = min_clock;
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unsigned clock = mode->clock;
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+ bool hdmi;
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switch (nv_encoder->dcb->type) {
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case DCB_OUTPUT_LVDS:
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@@ -847,8 +863,10 @@ nouveau_connector_mode_valid(struct drm_connector *connector,
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max_clock = 400000;
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break;
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case DCB_OUTPUT_TMDS:
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- max_clock = get_tmds_link_bandwidth(connector);
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- if (nouveau_duallink && nv_encoder->dcb->duallink_possible)
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+ hdmi = drm_detect_hdmi_monitor(nv_connector->edid);
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+ max_clock = get_tmds_link_bandwidth(connector, hdmi);
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+ if (!hdmi && nouveau_duallink &&
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+ nv_encoder->dcb->duallink_possible)
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max_clock *= 2;
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break;
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case DCB_OUTPUT_ANALOG:
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