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@@ -31,6 +31,8 @@ static void __init arc_set_early_base_baud(unsigned long dt_root)
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arc_base_baud = 166666666; /* Fixed 166.6MHz clk (TB10x) */
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else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
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arc_base_baud = 33333333; /* Fixed 33MHz clk (AXS10x) */
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+ else if (of_flat_dt_is_compatible(dt_root, "ezchip,arc-nps"))
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+ arc_base_baud = 800000000; /* Fixed 800MHz clk (NPS) */
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else
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arc_base_baud = 50000000; /* Fixed default 50MHz */
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}
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