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@@ -419,63 +419,160 @@ static int gpr64_set(struct task_struct *target,
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#endif /* CONFIG_64BIT */
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+/*
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+ * Copy the floating-point context to the supplied NT_PRFPREG buffer,
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+ * !CONFIG_CPU_HAS_MSA variant. FP context's general register slots
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+ * correspond 1:1 to buffer slots. Only general registers are copied.
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+ */
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+static int fpr_get_fpa(struct task_struct *target,
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+ unsigned int *pos, unsigned int *count,
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+ void **kbuf, void __user **ubuf)
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+{
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+ return user_regset_copyout(pos, count, kbuf, ubuf,
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+ &target->thread.fpu,
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+ 0, NUM_FPU_REGS * sizeof(elf_fpreg_t));
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+}
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+
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+/*
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+ * Copy the floating-point context to the supplied NT_PRFPREG buffer,
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+ * CONFIG_CPU_HAS_MSA variant. Only lower 64 bits of FP context's
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+ * general register slots are copied to buffer slots. Only general
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+ * registers are copied.
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+ */
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+static int fpr_get_msa(struct task_struct *target,
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+ unsigned int *pos, unsigned int *count,
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+ void **kbuf, void __user **ubuf)
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+{
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+ unsigned int i;
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+ u64 fpr_val;
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+ int err;
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+
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+ BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
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+ for (i = 0; i < NUM_FPU_REGS; i++) {
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+ fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
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+ err = user_regset_copyout(pos, count, kbuf, ubuf,
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+ &fpr_val, i * sizeof(elf_fpreg_t),
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+ (i + 1) * sizeof(elf_fpreg_t));
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+ if (err)
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+ return err;
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+ }
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+
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+ return 0;
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+}
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+
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+/*
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+ * Copy the floating-point context to the supplied NT_PRFPREG buffer.
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+ * Choose the appropriate helper for general registers, and then copy
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+ * the FCSR register separately.
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+ */
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static int fpr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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- unsigned i;
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+ const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
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int err;
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- u64 fpr_val;
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- /* XXX fcr31 */
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+ if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
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+ err = fpr_get_fpa(target, &pos, &count, &kbuf, &ubuf);
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+ else
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+ err = fpr_get_msa(target, &pos, &count, &kbuf, &ubuf);
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+ if (err)
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+ return err;
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- if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
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- return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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- &target->thread.fpu,
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- 0, sizeof(elf_fpregset_t));
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+ err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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+ &target->thread.fpu.fcr31,
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+ fcr31_pos, fcr31_pos + sizeof(u32));
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- for (i = 0; i < NUM_FPU_REGS; i++) {
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- fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
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- err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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- &fpr_val, i * sizeof(elf_fpreg_t),
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- (i + 1) * sizeof(elf_fpreg_t));
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+ return err;
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+}
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+
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+/*
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+ * Copy the supplied NT_PRFPREG buffer to the floating-point context,
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+ * !CONFIG_CPU_HAS_MSA variant. Buffer slots correspond 1:1 to FP
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+ * context's general register slots. Only general registers are copied.
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+ */
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+static int fpr_set_fpa(struct task_struct *target,
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+ unsigned int *pos, unsigned int *count,
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+ const void **kbuf, const void __user **ubuf)
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+{
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+ return user_regset_copyin(pos, count, kbuf, ubuf,
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+ &target->thread.fpu,
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+ 0, NUM_FPU_REGS * sizeof(elf_fpreg_t));
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+}
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+
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+/*
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+ * Copy the supplied NT_PRFPREG buffer to the floating-point context,
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+ * CONFIG_CPU_HAS_MSA variant. Buffer slots are copied to lower 64
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+ * bits only of FP context's general register slots. Only general
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+ * registers are copied.
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+ */
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+static int fpr_set_msa(struct task_struct *target,
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+ unsigned int *pos, unsigned int *count,
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+ const void **kbuf, const void __user **ubuf)
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+{
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+ unsigned int i;
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+ u64 fpr_val;
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+ int err;
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+
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+ BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
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+ for (i = 0; i < NUM_FPU_REGS && *count > 0; i++) {
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+ err = user_regset_copyin(pos, count, kbuf, ubuf,
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+ &fpr_val, i * sizeof(elf_fpreg_t),
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+ (i + 1) * sizeof(elf_fpreg_t));
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if (err)
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return err;
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+ set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
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}
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return 0;
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}
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+/*
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+ * Copy the supplied NT_PRFPREG buffer to the floating-point context.
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+ * Choose the appropriate helper for general registers, and then copy
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+ * the FCSR register separately.
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+ *
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+ * We optimize for the case where `count % sizeof(elf_fpreg_t) == 0',
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+ * which is supposed to have been guaranteed by the kernel before
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+ * calling us, e.g. in `ptrace_regset'. We enforce that requirement,
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+ * so that we can safely avoid preinitializing temporaries for
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+ * partial register writes.
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+ */
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static int fpr_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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- unsigned i;
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+ const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
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+ u32 fcr31;
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int err;
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- u64 fpr_val;
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- /* XXX fcr31 */
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+ BUG_ON(count % sizeof(elf_fpreg_t));
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+
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+ if (pos + count > sizeof(elf_fpregset_t))
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+ return -EIO;
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init_fp_ctx(target);
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- if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
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- return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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- &target->thread.fpu,
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- 0, sizeof(elf_fpregset_t));
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+ if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
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+ err = fpr_set_fpa(target, &pos, &count, &kbuf, &ubuf);
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+ else
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+ err = fpr_set_msa(target, &pos, &count, &kbuf, &ubuf);
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+ if (err)
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+ return err;
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- BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
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- for (i = 0; i < NUM_FPU_REGS && count >= sizeof(elf_fpreg_t); i++) {
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+ if (count > 0) {
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err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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- &fpr_val, i * sizeof(elf_fpreg_t),
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- (i + 1) * sizeof(elf_fpreg_t));
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+ &fcr31,
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+ fcr31_pos, fcr31_pos + sizeof(u32));
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if (err)
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return err;
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- set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
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+
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+ ptrace_setfcr31(target, fcr31);
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}
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- return 0;
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+ return err;
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}
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enum mips_regset {
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