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@@ -1,175 +0,0 @@
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-/* arch/arm/plat-samsung/include/plat/uncompress.h
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- *
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- * Copyright 2003, 2007 Simtec Electronics
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- * http://armlinux.simtec.co.uk/
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- * Ben Dooks <ben@simtec.co.uk>
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- *
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- * S3C - uncompress code
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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-*/
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-
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-#ifndef __ASM_PLAT_UNCOMPRESS_H
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-#define __ASM_PLAT_UNCOMPRESS_H
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-
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-typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
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-
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-/* uart setup */
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-
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-unsigned int fifo_mask;
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-unsigned int fifo_max;
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-
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-volatile u8 *uart_base;
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-
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-/* forward declerations */
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-
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-static void arch_detect_cpu(void);
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-
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-/* defines for UART registers */
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-
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-#include <linux/serial_s3c.h>
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-
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-/* working in physical space... */
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-#define S3C_WDOGREG(x) ((S3C_PA_WDT + (x)))
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-
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-#define S3C2410_WTCON S3C_WDOGREG(0x00)
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-#define S3C2410_WTDAT S3C_WDOGREG(0x04)
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-#define S3C2410_WTCNT S3C_WDOGREG(0x08)
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-
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-#define S3C2410_WTCON_RSTEN (1 << 0)
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-#define S3C2410_WTCON_ENABLE (1 << 5)
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-
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-#define S3C2410_WTCON_DIV128 (3 << 3)
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-
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-#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
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-
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-/* how many bytes we allow into the FIFO at a time in FIFO mode */
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-#define FIFO_MAX (14)
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-
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-static __inline__ void
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-uart_wr(unsigned int reg, unsigned int val)
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-{
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- volatile unsigned int *ptr;
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-
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- ptr = (volatile unsigned int *)(reg + uart_base);
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- *ptr = val;
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-}
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-
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-static __inline__ unsigned int
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-uart_rd(unsigned int reg)
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-{
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- volatile unsigned int *ptr;
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-
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- ptr = (volatile unsigned int *)(reg + uart_base);
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- return *ptr;
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-}
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-
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-/* we can deal with the case the UARTs are being run
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- * in FIFO mode, so that we don't hold up our execution
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- * waiting for tx to happen...
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-*/
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-
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-static void putc(int ch)
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-{
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- if (!config_enabled(CONFIG_DEBUG_LL))
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- return;
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-
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- if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
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- int level;
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-
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- while (1) {
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- level = uart_rd(S3C2410_UFSTAT);
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- level &= fifo_mask;
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-
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- if (level < fifo_max)
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- break;
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- }
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-
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- } else {
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- /* not using fifos */
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-
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- while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
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- barrier();
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- }
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-
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- /* write byte to transmission register */
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- uart_wr(S3C2410_UTXH, ch);
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-}
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-
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-static inline void flush(void)
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-{
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-}
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-
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-#define __raw_writel(d, ad) \
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- do { \
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- *((volatile unsigned int __force *)(ad)) = (d); \
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- } while (0)
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-
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-#ifdef CONFIG_S3C_BOOT_ERROR_RESET
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-
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-static void arch_decomp_error(const char *x)
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-{
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- putstr("\n\n");
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- putstr(x);
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- putstr("\n\n -- System resetting\n");
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-
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- __raw_writel(0x4000, S3C2410_WTDAT);
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- __raw_writel(0x4000, S3C2410_WTCNT);
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- __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
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-
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- while(1);
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-}
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-
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-#define arch_error arch_decomp_error
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-#endif
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-
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-#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
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-static inline void arch_enable_uart_fifo(void)
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-{
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- u32 fifocon;
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-
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- if (!config_enabled(CONFIG_DEBUG_LL))
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- return;
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-
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- fifocon = uart_rd(S3C2410_UFCON);
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-
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- if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
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- fifocon |= S3C2410_UFCON_RESETBOTH;
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- uart_wr(S3C2410_UFCON, fifocon);
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-
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- /* wait for fifo reset to complete */
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- while (1) {
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- fifocon = uart_rd(S3C2410_UFCON);
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- if (!(fifocon & S3C2410_UFCON_RESETBOTH))
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- break;
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- }
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-
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- uart_wr(S3C2410_UFCON, S3C2410_UFCON_FIFOMODE);
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- }
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-}
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-#else
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-#define arch_enable_uart_fifo() do { } while(0)
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-#endif
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-
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-
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-static void
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-arch_decomp_setup(void)
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-{
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- /* we may need to setup the uart(s) here if we are not running
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- * on an BAST... the BAST will have left the uarts configured
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- * after calling linux.
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- */
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-
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- arch_detect_cpu();
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-
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- /* Enable the UART FIFOs if they where not enabled and our
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- * configuration says we should turn them on.
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- */
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-
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- arch_enable_uart_fifo();
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-}
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-
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-
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-#endif /* __ASM_PLAT_UNCOMPRESS_H */
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Heiko Stuebner