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@@ -20,34 +20,22 @@
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#include <linux/of_pci.h>
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#include <linux/platform_device.h>
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-#include "pci-host-common.h"
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+#include "../ecam.h"
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#define PEM_CFG_WR 0x28
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#define PEM_CFG_RD 0x30
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struct thunder_pem_pci {
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- struct gen_pci gen_pci;
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u32 ea_entry[3];
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void __iomem *pem_reg_base;
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};
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-static void __iomem *thunder_pem_map_bus(struct pci_bus *bus,
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- unsigned int devfn, int where)
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-{
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- struct gen_pci *pci = bus->sysdata;
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- resource_size_t idx = bus->number - pci->cfg.bus_range->start;
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-
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- return pci->cfg.win[idx] + ((devfn << 16) | where);
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-}
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-
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static int thunder_pem_bridge_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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u64 read_val;
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- struct thunder_pem_pci *pem_pci;
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- struct gen_pci *pci = bus->sysdata;
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-
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- pem_pci = container_of(pci, struct thunder_pem_pci, gen_pci);
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+ struct pci_config_window *cfg = bus->sysdata;
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+ struct thunder_pem_pci *pem_pci = (struct thunder_pem_pci *)cfg->priv;
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if (devfn != 0 || where >= 2048) {
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*val = ~0;
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@@ -132,17 +120,17 @@ static int thunder_pem_bridge_read(struct pci_bus *bus, unsigned int devfn,
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static int thunder_pem_config_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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- struct gen_pci *pci = bus->sysdata;
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+ struct pci_config_window *cfg = bus->sysdata;
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- if (bus->number < pci->cfg.bus_range->start ||
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- bus->number > pci->cfg.bus_range->end)
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+ if (bus->number < cfg->busr.start ||
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+ bus->number > cfg->busr.end)
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return PCIBIOS_DEVICE_NOT_FOUND;
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/*
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* The first device on the bus is the PEM PCIe bridge.
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* Special case its config access.
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*/
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- if (bus->number == pci->cfg.bus_range->start)
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+ if (bus->number == cfg->busr.start)
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return thunder_pem_bridge_read(bus, devfn, where, size, val);
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return pci_generic_config_read(bus, devfn, where, size, val);
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@@ -187,12 +175,11 @@ static u32 thunder_pem_bridge_w1c_bits(int where)
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static int thunder_pem_bridge_write(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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- struct gen_pci *pci = bus->sysdata;
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- struct thunder_pem_pci *pem_pci;
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+ struct pci_config_window *cfg = bus->sysdata;
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+ struct thunder_pem_pci *pem_pci = (struct thunder_pem_pci *)cfg->priv;
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u64 write_val, read_val;
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u32 mask = 0;
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- pem_pci = container_of(pci, struct thunder_pem_pci, gen_pci);
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if (devfn != 0 || where >= 2048)
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return PCIBIOS_DEVICE_NOT_FOUND;
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@@ -256,53 +243,38 @@ static int thunder_pem_bridge_write(struct pci_bus *bus, unsigned int devfn,
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static int thunder_pem_config_write(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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- struct gen_pci *pci = bus->sysdata;
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+ struct pci_config_window *cfg = bus->sysdata;
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- if (bus->number < pci->cfg.bus_range->start ||
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- bus->number > pci->cfg.bus_range->end)
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+ if (bus->number < cfg->busr.start ||
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+ bus->number > cfg->busr.end)
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return PCIBIOS_DEVICE_NOT_FOUND;
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/*
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* The first device on the bus is the PEM PCIe bridge.
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* Special case its config access.
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*/
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- if (bus->number == pci->cfg.bus_range->start)
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+ if (bus->number == cfg->busr.start)
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return thunder_pem_bridge_write(bus, devfn, where, size, val);
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return pci_generic_config_write(bus, devfn, where, size, val);
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}
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-static struct gen_pci_cfg_bus_ops thunder_pem_bus_ops = {
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- .bus_shift = 24,
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- .ops = {
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- .map_bus = thunder_pem_map_bus,
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- .read = thunder_pem_config_read,
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- .write = thunder_pem_config_write,
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- }
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-};
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-
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-static const struct of_device_id thunder_pem_of_match[] = {
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- { .compatible = "cavium,pci-host-thunder-pem",
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- .data = &thunder_pem_bus_ops },
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-
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- { },
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-};
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-MODULE_DEVICE_TABLE(of, thunder_pem_of_match);
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-
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-static int thunder_pem_probe(struct platform_device *pdev)
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+static int thunder_pem_init(struct device *dev, struct pci_config_window *cfg)
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{
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- struct device *dev = &pdev->dev;
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- const struct of_device_id *of_id;
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resource_size_t bar4_start;
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struct resource *res_pem;
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struct thunder_pem_pci *pem_pci;
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+ struct platform_device *pdev;
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+
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+ /* Only OF support for now */
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+ if (!dev->of_node)
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+ return -EINVAL;
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pem_pci = devm_kzalloc(dev, sizeof(*pem_pci), GFP_KERNEL);
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if (!pem_pci)
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return -ENOMEM;
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- of_id = of_match_node(thunder_pem_of_match, dev->of_node);
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- pem_pci->gen_pci.cfg.ops = (struct gen_pci_cfg_bus_ops *)of_id->data;
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+ pdev = to_platform_device(dev);
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/*
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* The second register range is the PEM bridge to the PCIe
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@@ -330,7 +302,29 @@ static int thunder_pem_probe(struct platform_device *pdev)
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pem_pci->ea_entry[1] = (u32)(res_pem->end - bar4_start) & ~3u;
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pem_pci->ea_entry[2] = (u32)(bar4_start >> 32);
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- return pci_host_common_probe(pdev, &pem_pci->gen_pci);
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+ cfg->priv = pem_pci;
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+ return 0;
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+}
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+
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+static struct pci_ecam_ops pci_thunder_pem_ops = {
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+ .bus_shift = 24,
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+ .init = thunder_pem_init,
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+ .pci_ops = {
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+ .map_bus = pci_ecam_map_bus,
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+ .read = thunder_pem_config_read,
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+ .write = thunder_pem_config_write,
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+ }
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+};
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+
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+static const struct of_device_id thunder_pem_of_match[] = {
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+ { .compatible = "cavium,pci-host-thunder-pem" },
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+ { },
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+};
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+MODULE_DEVICE_TABLE(of, thunder_pem_of_match);
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+
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+static int thunder_pem_probe(struct platform_device *pdev)
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+{
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+ return pci_host_common_probe(pdev, &pci_thunder_pem_ops);
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}
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static struct platform_driver thunder_pem_driver = {
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