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+STMicroelectronics STM32 USB HS PHY controller
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+
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+The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
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+switch. It controls PHY configuration and status, and the UTMI+ switch that
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+selects either OTG or HOST controller for the second PHY port. It also sets
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+PLL configuration.
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+
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+USBPHYC
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+ |_ PLL
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+ |
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+ |_ PHY port#1 _________________ HOST controller
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+ | _ |
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+ | / 1|________________|
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+ |_ PHY port#2 ----| |________________
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+ | \_0| |
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+ |_ UTMI switch_______| OTG controller
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+
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+
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+Phy provider node
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+=================
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+
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+Required properties:
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+- compatible: must be "st,stm32mp1-usbphyc"
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+- reg: address and length of the usb phy control register set
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+- clocks: phandle + clock specifier for the PLL phy clock
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+- #address-cells: number of address cells for phys sub-nodes, must be <1>
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+- #size-cells: number of size cells for phys sub-nodes, must be <0>
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+
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+Optional properties:
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+- assigned-clocks: phandle + clock specifier for the PLL phy clock
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+- assigned-clock-parents: the PLL phy clock parent
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+- resets: phandle + reset specifier
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+
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+Required nodes: one sub-node per port the controller provides.
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+
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+Phy sub-nodes
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+==============
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+
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+Required properties:
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+- reg: phy port index
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+- phy-supply: phandle to the regulator providing 3V3 power to the PHY,
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+ see phy-bindings.txt in the same directory.
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+- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
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+- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
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+- #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
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+ port#1 and must be <1> for PHY port#2, to select USB controller
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+
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+
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+Example:
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+ usbphyc: usb-phy@5a006000 {
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+ compatible = "st,stm32mp1-usbphyc";
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+ reg = <0x5a006000 0x1000>;
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+ clocks = <&rcc_clk USBPHY_K>;
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+ resets = <&rcc_rst USBPHY_R>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ usbphyc_port0: usb-phy@0 {
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+ reg = <0>;
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+ phy-supply = <&vdd_usb>;
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+ vdda1v1-supply = <®11>;
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+ vdda1v8-supply = <®18>
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+ #phy-cells = <0>;
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+ };
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+
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+ usbphyc_port1: usb-phy@1 {
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+ reg = <1>;
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+ phy-supply = <&vdd_usb>;
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+ vdda1v1-supply = <®11>;
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+ vdda1v8-supply = <®18>
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+ #phy-cells = <1>;
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+ };
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+ };
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