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@@ -31,8 +31,6 @@
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#define GC_REGS_OFFS 0xe802c
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#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000)
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-#define DOVE_PMU_SIGNAL_SELECT_0 (DOVE_SB_REGS_VIRT_BASE + 0xd802C)
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-#define DOVE_PMU_SIGNAL_SELECT_1 (DOVE_SB_REGS_VIRT_BASE + 0xd8030)
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#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
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#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
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#define DOVE_TWSI_ENABLE_OPTION1 BIT(7)
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@@ -59,6 +57,10 @@
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#define SD1_GPIO_SEL BIT(1)
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#define SD0_GPIO_SEL BIT(0)
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+/* PMU Signal Select registers */
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+#define PMU_SIGNAL_SELECT_0 0x00
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+#define PMU_SIGNAL_SELECT_1 0x04
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+
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#define CONFIG_PMU BIT(4)
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static void __iomem *mpp_base;
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@@ -86,7 +88,7 @@ static int dove_pmu_mpp_ctrl_get(unsigned pid, unsigned long *config)
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if ((pmu & BIT(pid)) == 0)
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return default_mpp_ctrl_get(mpp_base, pid, config);
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- func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off);
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+ func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off);
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*config = (func >> shift) & MVEBU_MPP_MASK;
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*config |= CONFIG_PMU;
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@@ -106,10 +108,10 @@ static int dove_pmu_mpp_ctrl_set(unsigned pid, unsigned long config)
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}
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writel(pmu | BIT(pid), mpp_base + PMU_MPP_GENERAL_CTRL);
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- func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off);
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+ func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off);
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func &= ~(MVEBU_MPP_MASK << shift);
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func |= (config & MVEBU_MPP_MASK) << shift;
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- writel(func, DOVE_PMU_SIGNAL_SELECT_0 + off);
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+ writel(func, pmu_base + PMU_SIGNAL_SELECT_0 + off);
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return 0;
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}
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