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Merge tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

Pull "Rockchip dts64 changes for 4.10" from Heiko Stübner:

Some more powerdomains and usb2-otg support for the rk3399 as well
as the binding doc for the 32bit rk1108 eval board to prevent it
from conflicting with the recently added 64bit px5 board.

* tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: add rockchip RK1108 Evaluation board
  arm64: dts: rockchip: add usb2-phy otg-port support for rk3399
  arm64: dts: rockchip: add pd_sd power-domain node for rk3399
  arm64: dts: rockchip: add eMMC's power domain support for rk3399
  arm64: dts: rockchip: add backlight support for rk3399 evb board
  arm64: dts: rockchip: add gmac needed pclk for rk3399 pd
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+ 4 - 0
Documentation/devicetree/bindings/arm/rockchip.txt

@@ -107,6 +107,10 @@ Rockchip platforms device tree bindings
     Required root node properties:
     Required root node properties:
       - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
       - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
 
 
+- Rockchip RK1108 Evaluation board
+    Required root node properties:
+      - compatible = "rockchip,rk1108-evb", "rockchip,rk1108";
+
 - Rockchip RK3368 evb:
 - Rockchip RK3368 evb:
     Required root node properties:
     Required root node properties:
       - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
       - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";

+ 40 - 0
arch/arm64/boot/dts/rockchip/rk3399-evb.dts

@@ -49,6 +49,46 @@
 	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
 	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
 		     "google,rk3399evb-rev2";
 		     "google,rk3399evb-rev2";
 
 
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+		pwms = <&pwm0 0 25000 0>;
+	};
+
 	clkin_gmac: external-gmac-clock {
 	clkin_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		compatible = "fixed-clock";
 		clock-frequency = <125000000>;
 		clock-frequency = <125000000>;

+ 45 - 1
arch/arm64/boot/dts/rockchip/rk3399.dtsi

@@ -253,6 +253,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
 		fifo-depth = <0x100>;
+		power-domains = <&power RK3399_PD_SD>;
 		status = "disabled";
 		status = "disabled";
 	};
 	};
 
 
@@ -269,6 +270,7 @@
 		#clock-cells = <0>;
 		#clock-cells = <0>;
 		phys = <&emmc_phy>;
 		phys = <&emmc_phy>;
 		phy-names = "phy_arasan";
 		phy-names = "phy_arasan";
+		power-domains = <&power RK3399_PD_EMMC>;
 		status = "disabled";
 		status = "disabled";
 	};
 	};
 
 
@@ -690,6 +692,16 @@
 		status = "disabled";
 		status = "disabled";
 	};
 	};
 
 
+	qos_sd: qos@ffa74000 {
+		compatible = "syscon";
+		reg = <0x0 0xffa74000 0x0 0x20>;
+	};
+
+	qos_emmc: qos@ffa58000 {
+		compatible = "syscon";
+		reg = <0x0 0xffa58000 0x0 0x20>;
+	};
+
 	qos_gmac: qos@ffa5c000 {
 	qos_gmac: qos@ffa5c000 {
 		compatible = "syscon";
 		compatible = "syscon";
 		reg = <0x0 0xffa5c000 0x0 0x20>;
 		reg = <0x0 0xffa5c000 0x0 0x20>;
@@ -823,11 +835,23 @@
 			};
 			};
 
 
 			/* These power domains are grouped by VD_LOGIC */
 			/* These power domains are grouped by VD_LOGIC */
+			pd_emmc@RK3399_PD_EMMC {
+				reg = <RK3399_PD_EMMC>;
+				clocks = <&cru ACLK_EMMC>;
+				pm_qos = <&qos_emmc>;
+			};
 			pd_gmac@RK3399_PD_GMAC {
 			pd_gmac@RK3399_PD_GMAC {
 				reg = <RK3399_PD_GMAC>;
 				reg = <RK3399_PD_GMAC>;
-				clocks = <&cru ACLK_GMAC>;
+				clocks = <&cru ACLK_GMAC>,
+					 <&cru PCLK_GMAC>;
 				pm_qos = <&qos_gmac>;
 				pm_qos = <&qos_gmac>;
 			};
 			};
+			pd_sd@RK3399_PD_SD {
+				reg = <RK3399_PD_SD>;
+				clocks = <&cru HCLK_SDMMC>,
+					 <&cru SCLK_SDMMC>;
+				pm_qos = <&qos_sd>;
+			};
 			pd_vio@RK3399_PD_VIO {
 			pd_vio@RK3399_PD_VIO {
 				reg = <RK3399_PD_VIO>;
 				reg = <RK3399_PD_VIO>;
 				#address-cells = <1>;
 				#address-cells = <1>;
@@ -1104,6 +1128,16 @@
 				interrupt-names = "linestate";
 				interrupt-names = "linestate";
 				status = "disabled";
 				status = "disabled";
 			};
 			};
+
+			u2phy0_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
+					     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
+					     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
 		};
 		};
 
 
 		u2phy1: usb2-phy@e460 {
 		u2phy1: usb2-phy@e460 {
@@ -1121,6 +1155,16 @@
 				interrupt-names = "linestate";
 				interrupt-names = "linestate";
 				status = "disabled";
 				status = "disabled";
 			};
 			};
+
+			u2phy1_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
+					     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
+					     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
 		};
 		};
 
 
 		emmc_phy: phy@f780 {
 		emmc_phy: phy@f780 {