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@@ -36,7 +36,7 @@
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#include "cikd.h"
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/* 1 second timeout */
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-#define VCE_IDLE_TIMEOUT_MS 1000
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+#define VCE_IDLE_TIMEOUT msecs_to_jiffies(1000)
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/* Firmware Names */
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#ifdef CONFIG_DRM_AMDGPU_CIK
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@@ -310,8 +310,7 @@ static void amdgpu_vce_idle_work_handler(struct work_struct *work)
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amdgpu_asic_set_vce_clocks(adev, 0, 0);
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}
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} else {
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- schedule_delayed_work(&adev->vce.idle_work,
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- msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
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+ schedule_delayed_work(&adev->vce.idle_work, VCE_IDLE_TIMEOUT);
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}
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}
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@@ -324,17 +323,12 @@ static void amdgpu_vce_idle_work_handler(struct work_struct *work)
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*/
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static void amdgpu_vce_note_usage(struct amdgpu_device *adev)
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{
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- bool streams_changed = false;
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bool set_clocks = !cancel_delayed_work_sync(&adev->vce.idle_work);
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- set_clocks &= schedule_delayed_work(&adev->vce.idle_work,
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- msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
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- if (adev->pm.dpm_enabled) {
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- /* XXX figure out if the streams changed */
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- streams_changed = false;
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- }
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+ set_clocks &= schedule_delayed_work(&adev->vce.idle_work,
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+ VCE_IDLE_TIMEOUT);
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- if (set_clocks || streams_changed) {
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+ if (set_clocks) {
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if (adev->pm.dpm_enabled) {
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amdgpu_dpm_enable_vce(adev, true);
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} else {
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@@ -357,6 +351,7 @@ void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp)
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int i, r;
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for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {
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uint32_t handle = atomic_read(&adev->vce.handles[i]);
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+
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if (!handle || adev->vce.filp[i] != filp)
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continue;
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@@ -648,7 +643,7 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
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}
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switch (cmd) {
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- case 0x00000001: // session
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+ case 0x00000001: /* session */
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handle = amdgpu_get_ib_value(p, ib_idx, idx + 2);
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session_idx = amdgpu_vce_validate_handle(p, handle,
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&allocated);
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@@ -657,12 +652,12 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
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size = &p->adev->vce.img_size[session_idx];
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break;
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- case 0x00000002: // task info
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+ case 0x00000002: /* task info */
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fb_idx = amdgpu_get_ib_value(p, ib_idx, idx + 6);
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bs_idx = amdgpu_get_ib_value(p, ib_idx, idx + 7);
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break;
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- case 0x01000001: // create
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+ case 0x01000001: /* create */
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created = true;
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if (!allocated) {
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DRM_ERROR("Handle already in use!\n");
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@@ -675,16 +670,16 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
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8 * 3 / 2;
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break;
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- case 0x04000001: // config extension
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- case 0x04000002: // pic control
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- case 0x04000005: // rate control
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- case 0x04000007: // motion estimation
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- case 0x04000008: // rdo
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- case 0x04000009: // vui
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- case 0x05000002: // auxiliary buffer
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+ case 0x04000001: /* config extension */
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+ case 0x04000002: /* pic control */
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+ case 0x04000005: /* rate control */
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+ case 0x04000007: /* motion estimation */
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+ case 0x04000008: /* rdo */
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+ case 0x04000009: /* vui */
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+ case 0x05000002: /* auxiliary buffer */
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break;
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- case 0x03000001: // encode
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+ case 0x03000001: /* encode */
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r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 10, idx + 9,
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*size, 0);
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if (r)
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@@ -696,18 +691,18 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
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goto out;
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break;
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- case 0x02000001: // destroy
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+ case 0x02000001: /* destroy */
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destroyed = true;
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break;
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- case 0x05000001: // context buffer
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+ case 0x05000001: /* context buffer */
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r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2,
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*size * 2, 0);
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if (r)
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goto out;
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break;
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- case 0x05000004: // video bitstream buffer
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+ case 0x05000004: /* video bitstream buffer */
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tmp = amdgpu_get_ib_value(p, ib_idx, idx + 4);
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r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2,
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tmp, bs_idx);
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@@ -715,7 +710,7 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
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goto out;
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break;
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- case 0x05000005: // feedback buffer
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+ case 0x05000005: /* feedback buffer */
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r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2,
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4096, fb_idx);
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if (r)
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