MIPS: Loongson-3: Select MIPS_L1_CACHE_SHIFT_6 · 17c99d9421 - Gogs: Go Git Service GfA electronic

MIPS: Loongson-3: Select MIPS_L1_CACHE_SHIFT_6

Some newer Loongson-3 have 64 bytes cache lines, so select
MIPS_L1_CACHE_SHIFT_6.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@caviumnetworks.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/15755/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Huacai Chen 8 years ago

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294d627437

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17c99d9421

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				@@ -1374,6 +1374,7 @@ config CPU_LOONGSON3
			
				 	select WEAK_ORDERING
			
				 	select WEAK_REORDERING_BEYOND_LLSC
			
				 	select MIPS_PGD_C0_CONTEXT
			
				+	select MIPS_L1_CACHE_SHIFT_6
			
				 	select GPIOLIB
			
				 	help
			
				 		The Loongson 3 processor implements the MIPS64R2 instruction