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@@ -289,12 +289,10 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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/* Enable ASPM */
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if (chip->aspm_l0s_l1_en) {
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if (chip->dynamic_aspm) {
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- if (CHK_SDIO_EXIST(chip)) {
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- if (CHECK_PID(chip, 0x5288)) {
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- retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF, chip->aspm_l0s_l1_en);
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- if (retval != STATUS_SUCCESS)
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- TRACE_RET(chip, STATUS_FAIL);
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- }
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+ if (CHK_SDIO_EXIST(chip) && CHECK_PID(chip, 0x5288)) {
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+ retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF, chip->aspm_l0s_l1_en);
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+ if (retval != STATUS_SUCCESS)
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+ TRACE_RET(chip, STATUS_FAIL);
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}
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} else {
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if (CHECK_PID(chip, 0x5208))
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@@ -350,18 +348,14 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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}
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- if (CHECK_PID(chip, 0x5288)) {
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- if (!CHK_SDIO_EXIST(chip)) {
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- retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFFFF,
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- 0x0103);
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- if (retval != STATUS_SUCCESS)
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- TRACE_RET(chip, STATUS_FAIL);
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-
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- retval = rtsx_write_cfg_dw(chip, 2, 0x84, 0xFF, 0x03);
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- if (retval != STATUS_SUCCESS)
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- TRACE_RET(chip, STATUS_FAIL);
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+ if (CHECK_PID(chip, 0x5288) && !CHK_SDIO_EXIST(chip)) {
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+ retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFFFF, 0x0103);
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+ if (retval != STATUS_SUCCESS)
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+ TRACE_RET(chip, STATUS_FAIL);
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- }
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+ retval = rtsx_write_cfg_dw(chip, 2, 0x84, 0xFF, 0x03);
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+ if (retval != STATUS_SUCCESS)
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+ TRACE_RET(chip, STATUS_FAIL);
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}
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RTSX_WRITE_REG(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT);
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@@ -1727,10 +1721,8 @@ int rtsx_pre_handle_interrupt(struct rtsx_chip *chip)
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chip->ocp_int = ocp_int & status;
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#endif
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- if (chip->sd_io) {
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- if (chip->int_reg & DATA_DONE_INT)
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- chip->int_reg &= ~(u32)DATA_DONE_INT;
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- }
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+ if (chip->sd_io && (chip->int_reg & DATA_DONE_INT))
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+ chip->int_reg &= ~(u32)DATA_DONE_INT;
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return STATUS_SUCCESS;
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}
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@@ -1796,31 +1788,29 @@ void rtsx_do_before_power_down(struct rtsx_chip *chip, int pm_stat)
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void rtsx_enable_aspm(struct rtsx_chip *chip)
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{
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- if (chip->aspm_l0s_l1_en && chip->dynamic_aspm) {
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- if (!chip->aspm_enabled) {
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- dev_dbg(rtsx_dev(chip), "Try to enable ASPM\n");
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- chip->aspm_enabled = 1;
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+ if (chip->aspm_l0s_l1_en && chip->dynamic_aspm && !chip->aspm_enabled) {
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+ dev_dbg(rtsx_dev(chip), "Try to enable ASPM\n");
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+ chip->aspm_enabled = 1;
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- if (chip->asic_code && CHECK_PID(chip, 0x5208))
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- rtsx_write_phy_register(chip, 0x07, 0);
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- if (CHECK_PID(chip, 0x5208)) {
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- rtsx_write_register(chip, ASPM_FORCE_CTL, 0xF3,
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- 0x30 | chip->aspm_level[0]);
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- } else {
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- rtsx_write_config_byte(chip, LCTLR,
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- chip->aspm_l0s_l1_en);
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- }
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+ if (chip->asic_code && CHECK_PID(chip, 0x5208))
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+ rtsx_write_phy_register(chip, 0x07, 0);
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+ if (CHECK_PID(chip, 0x5208)) {
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+ rtsx_write_register(chip, ASPM_FORCE_CTL, 0xF3,
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+ 0x30 | chip->aspm_level[0]);
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+ } else {
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+ rtsx_write_config_byte(chip, LCTLR,
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+ chip->aspm_l0s_l1_en);
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+ }
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- if (CHK_SDIO_EXIST(chip)) {
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- u16 val = chip->aspm_l0s_l1_en | 0x0100;
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+ if (CHK_SDIO_EXIST(chip)) {
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+ u16 val = chip->aspm_l0s_l1_en | 0x0100;
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- if (CHECK_PID(chip, 0x5288))
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- rtsx_write_cfg_dw(chip, 2, 0xC0,
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- 0xFFFF, val);
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- else
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- rtsx_write_cfg_dw(chip, 1, 0xC0,
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- 0xFFFF, val);
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- }
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+ if (CHECK_PID(chip, 0x5288))
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+ rtsx_write_cfg_dw(chip, 2, 0xC0,
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+ 0xFFFF, val);
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+ else
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+ rtsx_write_cfg_dw(chip, 1, 0xC0,
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+ 0xFFFF, val);
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}
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}
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}
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@@ -1830,21 +1820,19 @@ void rtsx_disable_aspm(struct rtsx_chip *chip)
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if (CHECK_PID(chip, 0x5208))
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rtsx_monitor_aspm_config(chip);
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- if (chip->aspm_l0s_l1_en && chip->dynamic_aspm) {
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- if (chip->aspm_enabled) {
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- dev_dbg(rtsx_dev(chip), "Try to disable ASPM\n");
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- chip->aspm_enabled = 0;
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+ if (chip->aspm_l0s_l1_en && chip->dynamic_aspm && chip->aspm_enabled) {
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+ dev_dbg(rtsx_dev(chip), "Try to disable ASPM\n");
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+ chip->aspm_enabled = 0;
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- if (chip->asic_code && CHECK_PID(chip, 0x5208))
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- rtsx_write_phy_register(chip, 0x07, 0x0129);
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- if (CHECK_PID(chip, 0x5208))
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- rtsx_write_register(chip, ASPM_FORCE_CTL,
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- 0xF3, 0x30);
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- else
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- rtsx_write_config_byte(chip, LCTLR, 0x00);
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+ if (chip->asic_code && CHECK_PID(chip, 0x5208))
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+ rtsx_write_phy_register(chip, 0x07, 0x0129);
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+ if (CHECK_PID(chip, 0x5208))
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+ rtsx_write_register(chip, ASPM_FORCE_CTL,
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+ 0xF3, 0x30);
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+ else
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+ rtsx_write_config_byte(chip, LCTLR, 0x00);
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- wait_timeout(1);
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- }
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+ wait_timeout(1);
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}
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}
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