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@@ -10960,6 +10960,13 @@ static void tg3_timer(unsigned long __opaque)
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} else if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) &&
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tg3_flag(tp, 5780_CLASS)) {
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tg3_serdes_parallel_detect(tp);
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+ } else if (tg3_flag(tp, POLL_CPMU_LINK)) {
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+ u32 cpmu = tr32(TG3_CPMU_STATUS);
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+ bool link_up = !((cpmu & TG3_CPMU_STATUS_LINK_MASK) ==
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+ TG3_CPMU_STATUS_LINK_MASK);
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+
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+ if (link_up != tp->link_up)
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+ tg3_setup_phy(tp, false);
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}
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tp->timer_counter = tp->timer_multiplier;
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@@ -16766,6 +16773,9 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent)
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else
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tg3_flag_clear(tp, POLL_SERDES);
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+ if (tg3_flag(tp, ENABLE_APE) && tg3_flag(tp, ENABLE_ASF))
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+ tg3_flag_set(tp, POLL_CPMU_LINK);
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+
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tp->rx_offset = NET_SKB_PAD + NET_IP_ALIGN;
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tp->rx_copy_thresh = TG3_RX_COPY_THRESHOLD;
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if (tg3_asic_rev(tp) == ASIC_REV_5701 &&
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