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@@ -910,6 +910,9 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
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.get_config_memsize = &vi_get_config_memsize,
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};
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+#define CZ_REV_BRISTOL(rev) \
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+ ((rev >= 0xC8 && rev <= 0xCE) || (rev >= 0xE1 && rev <= 0xE6))
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+
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static int vi_common_early_init(void *handle)
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{
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bool smc_enabled = false;
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@@ -1057,7 +1060,7 @@ static int vi_common_early_init(void *handle)
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AMD_CG_SUPPORT_VCE_MGCG;
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/* rev0 hardware requires workarounds to support PG */
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adev->pg_flags = 0;
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- if (adev->rev_id != 0x00) {
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+ if (adev->rev_id != 0x00 || CZ_REV_BRISTOL(adev->pdev->revision)) {
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adev->pg_flags |=
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AMD_PG_SUPPORT_GFX_SMG |
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AMD_PG_SUPPORT_GFX_PIPELINE |
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