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@@ -19,6 +19,34 @@
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#include <net/dsa.h>
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#include "mv88e6xxx.h"
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+/* MDIO bus access can be nested in the case of PHYs connected to the
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+ * internal MDIO bus of the switch, which is accessed via MDIO bus of
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+ * the Ethernet interface. Avoid lockdep false positives by using
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+ * mutex_lock_nested().
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+ */
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+static int mv88e6xxx_mdiobus_read(struct mii_bus *bus, int addr, u32 regnum)
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+{
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+ int ret;
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+
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+ mutex_lock_nested(&bus->mdio_lock, SINGLE_DEPTH_NESTING);
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+ ret = bus->read(bus, addr, regnum);
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+ mutex_unlock(&bus->mdio_lock);
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+
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+ return ret;
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+}
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+
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+static int mv88e6xxx_mdiobus_write(struct mii_bus *bus, int addr, u32 regnum,
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+ u16 val)
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+{
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+ int ret;
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+
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+ mutex_lock_nested(&bus->mdio_lock, SINGLE_DEPTH_NESTING);
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+ ret = bus->write(bus, addr, regnum, val);
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+ mutex_unlock(&bus->mdio_lock);
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+
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+ return ret;
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+}
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+
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/* If the switch's ADDR[4:0] strap pins are strapped to zero, it will
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* use all 32 SMI bus addresses on its SMI bus, and all switch registers
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* will be directly accessible on some {device address,register address}
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@@ -33,7 +61,7 @@ static int mv88e6xxx_reg_wait_ready(struct mii_bus *bus, int sw_addr)
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int i;
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for (i = 0; i < 16; i++) {
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- ret = mdiobus_read(bus, sw_addr, SMI_CMD);
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+ ret = mv88e6xxx_mdiobus_read(bus, sw_addr, SMI_CMD);
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if (ret < 0)
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return ret;
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@@ -49,7 +77,7 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)
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int ret;
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if (sw_addr == 0)
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- return mdiobus_read(bus, addr, reg);
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+ return mv88e6xxx_mdiobus_read(bus, addr, reg);
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/* Wait for the bus to become free. */
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ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
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@@ -57,8 +85,8 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)
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return ret;
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/* Transmit the read command. */
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- ret = mdiobus_write(bus, sw_addr, SMI_CMD,
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- SMI_CMD_OP_22_READ | (addr << 5) | reg);
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+ ret = mv88e6xxx_mdiobus_write(bus, sw_addr, SMI_CMD,
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+ SMI_CMD_OP_22_READ | (addr << 5) | reg);
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if (ret < 0)
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return ret;
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@@ -68,7 +96,7 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)
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return ret;
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/* Read the data. */
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- ret = mdiobus_read(bus, sw_addr, SMI_DATA);
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+ ret = mv88e6xxx_mdiobus_read(bus, sw_addr, SMI_DATA);
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if (ret < 0)
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return ret;
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@@ -112,7 +140,7 @@ int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
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int ret;
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if (sw_addr == 0)
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- return mdiobus_write(bus, addr, reg, val);
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+ return mv88e6xxx_mdiobus_write(bus, addr, reg, val);
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/* Wait for the bus to become free. */
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ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
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@@ -120,13 +148,13 @@ int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
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return ret;
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/* Transmit the data to write. */
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- ret = mdiobus_write(bus, sw_addr, SMI_DATA, val);
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+ ret = mv88e6xxx_mdiobus_write(bus, sw_addr, SMI_DATA, val);
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if (ret < 0)
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return ret;
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/* Transmit the write command. */
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- ret = mdiobus_write(bus, sw_addr, SMI_CMD,
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- SMI_CMD_OP_22_WRITE | (addr << 5) | reg);
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+ ret = mv88e6xxx_mdiobus_write(bus, sw_addr, SMI_CMD,
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+ SMI_CMD_OP_22_WRITE | (addr << 5) | reg);
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if (ret < 0)
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return ret;
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