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@@ -682,6 +682,43 @@ static int iwl_pcie_load_section(struct iwl_trans *trans, u8 section_num,
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return ret;
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}
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+/*
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+ * Driver Takes the ownership on secure machine before FW load
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+ * and prevent race with the BT load.
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+ * W/A for ROM bug. (should be remove in the next Si step)
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+ */
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+static int iwl_pcie_rsa_race_bug_wa(struct iwl_trans *trans)
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+{
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+ u32 val, loop = 1000;
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+
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+ /* Check the RSA semaphore is accessible - if not, we are in trouble */
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+ val = iwl_read_prph(trans, PREG_AUX_BUS_WPROT_0);
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+ if (val & (BIT(1) | BIT(17))) {
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+ IWL_ERR(trans,
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+ "can't access the RSA semaphore it is write protected\n");
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+ return 0;
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+ }
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+
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+ /* take ownership on the AUX IF */
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+ iwl_write_prph(trans, WFPM_CTRL_REG, WFPM_AUX_CTL_AUX_IF_MAC_OWNER_MSK);
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+ iwl_write_prph(trans, AUX_MISC_MASTER1_EN, AUX_MISC_MASTER1_EN_SBE_MSK);
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+
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+ do {
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+ iwl_write_prph(trans, AUX_MISC_MASTER1_SMPHR_STATUS, 0x1);
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+ val = iwl_read_prph(trans, AUX_MISC_MASTER1_SMPHR_STATUS);
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+ if (val == 0x1) {
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+ iwl_write_prph(trans, RSA_ENABLE, 0);
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+ return 0;
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+ }
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+
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+ udelay(10);
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+ loop--;
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+ } while (loop > 0);
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+
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+ IWL_ERR(trans, "Failed to take ownership on secure machine\n");
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+ return -EIO;
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+}
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+
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static int iwl_pcie_load_cpu_sections_8000b(struct iwl_trans *trans,
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const struct fw_img *image,
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int cpu,
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@@ -901,6 +938,11 @@ static int iwl_pcie_load_given_ucode_8000b(struct iwl_trans *trans,
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if (trans->dbg_dest_tlv)
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iwl_pcie_apply_destination(trans);
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+ /* TODO: remove in the next Si step */
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+ ret = iwl_pcie_rsa_race_bug_wa(trans);
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+ if (ret)
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+ return ret;
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+
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/* configure the ucode to be ready to get the secured image */
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/* release CPU reset */
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iwl_write_prph(trans, RELEASE_CPU_RESET, RELEASE_CPU_RESET_BIT);
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