|
@@ -341,7 +341,7 @@ static void gfar_rx_offload_en(struct gfar_private *priv)
|
|
if (priv->ndev->features & (NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_RX))
|
|
if (priv->ndev->features & (NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_RX))
|
|
priv->uses_rxfcb = 1;
|
|
priv->uses_rxfcb = 1;
|
|
|
|
|
|
- if (priv->hwts_rx_en)
|
|
|
|
|
|
+ if (priv->hwts_rx_en || priv->rx_filer_enable)
|
|
priv->uses_rxfcb = 1;
|
|
priv->uses_rxfcb = 1;
|
|
}
|
|
}
|
|
|
|
|
|
@@ -351,7 +351,7 @@ static void gfar_mac_rx_config(struct gfar_private *priv)
|
|
u32 rctrl = 0;
|
|
u32 rctrl = 0;
|
|
|
|
|
|
if (priv->rx_filer_enable) {
|
|
if (priv->rx_filer_enable) {
|
|
- rctrl |= RCTRL_FILREN;
|
|
|
|
|
|
+ rctrl |= RCTRL_FILREN | RCTRL_PRSDEP_INIT;
|
|
/* Program the RIR0 reg with the required distribution */
|
|
/* Program the RIR0 reg with the required distribution */
|
|
if (priv->poll_mode == GFAR_SQ_POLLING)
|
|
if (priv->poll_mode == GFAR_SQ_POLLING)
|
|
gfar_write(®s->rir0, DEFAULT_2RXQ_RIR0);
|
|
gfar_write(®s->rir0, DEFAULT_2RXQ_RIR0);
|