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@@ -15,6 +15,7 @@
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#include <asm/ppc_asm.h>
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/asm-offsets.h>
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#include <asm/cache.h>
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#include <asm/cache.h>
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+#include <asm/mmu-hash64.h>
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/* Entry: r3 = crap, r4 = ptr to cputable entry
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/* Entry: r3 = crap, r4 = ptr to cputable entry
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*
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*
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@@ -139,7 +140,7 @@ __init_HFSCR:
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* (invalidate by congruence class). P7 has 128 CCs., P8 has 512.
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* (invalidate by congruence class). P7 has 128 CCs., P8 has 512.
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*/
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*/
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__init_tlb_power7:
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__init_tlb_power7:
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- li r6,128
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+ li r6,POWER7_TLB_SETS
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mtctr r6
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mtctr r6
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li r7,0xc00 /* IS field = 0b11 */
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li r7,0xc00 /* IS field = 0b11 */
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ptesync
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ptesync
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@@ -150,7 +151,7 @@ __init_tlb_power7:
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1: blr
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1: blr
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__init_tlb_power8:
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__init_tlb_power8:
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- li r6,512
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+ li r6,POWER8_TLB_SETS
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mtctr r6
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mtctr r6
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li r7,0xc00 /* IS field = 0b11 */
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li r7,0xc00 /* IS field = 0b11 */
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ptesync
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ptesync
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