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@@ -3060,14 +3060,25 @@ static struct event_constraint bdx_uncore_pcu_constraints[] = {
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void bdx_uncore_cpu_init(void)
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void bdx_uncore_cpu_init(void)
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{
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{
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+ int pkg = topology_phys_to_logical_pkg(0);
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+
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if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)
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if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)
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bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;
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bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;
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uncore_msr_uncores = bdx_msr_uncores;
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uncore_msr_uncores = bdx_msr_uncores;
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/* BDX-DE doesn't have SBOX */
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/* BDX-DE doesn't have SBOX */
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- if (boot_cpu_data.x86_model == 86)
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+ if (boot_cpu_data.x86_model == 86) {
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uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
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uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
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+ /* Detect systems with no SBOXes */
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+ } else if (uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3]) {
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+ struct pci_dev *pdev;
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+ u32 capid4;
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+ pdev = uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3];
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+ pci_read_config_dword(pdev, 0x94, &capid4);
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+ if (((capid4 >> 6) & 0x3) == 0)
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+ bdx_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
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+ }
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hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
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hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
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}
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}
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@@ -3285,6 +3296,11 @@ static const struct pci_device_id bdx_uncore_pci_ids[] = {
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PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6f46),
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PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6f46),
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.driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV, 2),
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.driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV, 2),
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},
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},
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+ { /* PCU.3 (for Capability registers) */
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+ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6fc0),
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+ .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
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+ HSWEP_PCI_PCU_3),
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+ },
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{ /* end: all zeroes */ }
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{ /* end: all zeroes */ }
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};
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};
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