|
@@ -104,18 +104,70 @@ static int xgene_ahci_init_memram(struct xgene_ahci_context *ctx)
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
+/**
|
|
|
+ * xgene_ahci_poll_reg_val- Poll a register on a specific value.
|
|
|
+ * @ap : ATA port of interest.
|
|
|
+ * @reg : Register of interest.
|
|
|
+ * @val : Value to be attained.
|
|
|
+ * @interval : waiting interval for polling.
|
|
|
+ * @timeout : timeout for achieving the value.
|
|
|
+ */
|
|
|
+static int xgene_ahci_poll_reg_val(struct ata_port *ap,
|
|
|
+ void __iomem *reg, unsigned
|
|
|
+ int val, unsigned long interval,
|
|
|
+ unsigned long timeout)
|
|
|
+{
|
|
|
+ unsigned long deadline;
|
|
|
+ unsigned int tmp;
|
|
|
+
|
|
|
+ tmp = ioread32(reg);
|
|
|
+ deadline = ata_deadline(jiffies, timeout);
|
|
|
+
|
|
|
+ while (tmp != val && time_before(jiffies, deadline)) {
|
|
|
+ ata_msleep(ap, interval);
|
|
|
+ tmp = ioread32(reg);
|
|
|
+ }
|
|
|
+
|
|
|
+ return tmp;
|
|
|
+}
|
|
|
+
|
|
|
/**
|
|
|
* xgene_ahci_restart_engine - Restart the dma engine.
|
|
|
* @ap : ATA port of interest
|
|
|
*
|
|
|
- * Restarts the dma engine inside the controller.
|
|
|
+ * Waits for completion of multiple commands and restarts
|
|
|
+ * the DMA engine inside the controller.
|
|
|
*/
|
|
|
static int xgene_ahci_restart_engine(struct ata_port *ap)
|
|
|
{
|
|
|
struct ahci_host_priv *hpriv = ap->host->private_data;
|
|
|
+ struct ahci_port_priv *pp = ap->private_data;
|
|
|
+ void __iomem *port_mmio = ahci_port_base(ap);
|
|
|
+ u32 fbs;
|
|
|
+
|
|
|
+ /*
|
|
|
+ * In case of PMP multiple IDENTIFY DEVICE commands can be
|
|
|
+ * issued inside PxCI. So need to poll PxCI for the
|
|
|
+ * completion of outstanding IDENTIFY DEVICE commands before
|
|
|
+ * we restart the DMA engine.
|
|
|
+ */
|
|
|
+ if (xgene_ahci_poll_reg_val(ap, port_mmio +
|
|
|
+ PORT_CMD_ISSUE, 0x0, 1, 100))
|
|
|
+ return -EBUSY;
|
|
|
|
|
|
ahci_stop_engine(ap);
|
|
|
ahci_start_fis_rx(ap);
|
|
|
+
|
|
|
+ /*
|
|
|
+ * Enable the PxFBS.FBS_EN bit as it
|
|
|
+ * gets cleared due to stopping the engine.
|
|
|
+ */
|
|
|
+ if (pp->fbs_supported) {
|
|
|
+ fbs = readl(port_mmio + PORT_FBS);
|
|
|
+ writel(fbs | PORT_FBS_EN, port_mmio + PORT_FBS);
|
|
|
+ fbs = readl(port_mmio + PORT_FBS);
|
|
|
+ }
|
|
|
+
|
|
|
hpriv->start_engine(ap);
|
|
|
|
|
|
return 0;
|
|
@@ -374,7 +426,7 @@ static struct ata_port_operations xgene_ahci_ops = {
|
|
|
};
|
|
|
|
|
|
static const struct ata_port_info xgene_ahci_port_info = {
|
|
|
- .flags = AHCI_FLAG_COMMON,
|
|
|
+ .flags = AHCI_FLAG_COMMON | ATA_FLAG_PMP,
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
.udma_mask = ATA_UDMA6,
|
|
|
.port_ops = &xgene_ahci_ops,
|