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@@ -588,6 +588,23 @@ static struct stfsm_seq stfsm_seq_erase_chip = {
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SEQ_CFG_STARTSEQ),
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};
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+static struct stfsm_seq stfsm_seq_write_status = {
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+ .seq_opc[0] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) |
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+ SEQ_OPC_OPCODE(FLASH_CMD_WREN) | SEQ_OPC_CSDEASSERT),
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+ .seq_opc[1] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) |
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+ SEQ_OPC_OPCODE(FLASH_CMD_WRSR)),
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+ .seq = {
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+ STFSM_INST_CMD1,
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+ STFSM_INST_CMD2,
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+ STFSM_INST_STA_WR1,
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+ STFSM_INST_STOP,
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+ },
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+ .seq_cfg = (SEQ_CFG_PADS_1 |
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+ SEQ_CFG_READNOTWRITE |
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+ SEQ_CFG_CSDEASSERT |
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+ SEQ_CFG_STARTSEQ),
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+};
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+
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static struct stfsm_seq stfsm_seq_wrvcr = {
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.seq_opc[0] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) |
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SEQ_OPC_OPCODE(FLASH_CMD_WREN) | SEQ_OPC_CSDEASSERT),
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@@ -817,6 +834,25 @@ static int stfsm_read_status(struct stfsm *fsm, uint8_t cmd,
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return 0;
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}
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+static int stfsm_write_status(struct stfsm *fsm, uint16_t status,
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+ int sta_bytes)
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+{
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+ struct stfsm_seq *seq = &stfsm_seq_write_status;
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+
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+ dev_dbg(fsm->dev, "writing STA[%s] 0x%04x\n",
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+ (sta_bytes == 1) ? "1" : "1+2", status);
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+
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+ seq->status = (uint32_t)status | STA_PADS_1 | STA_CSDEASSERT;
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+ seq->seq[2] = (sta_bytes == 1) ?
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+ STFSM_INST_STA_WR1 : STFSM_INST_STA_WR1_2;
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+
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+ stfsm_load_seq(fsm, seq);
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+
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+ stfsm_wait_seq(fsm);
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+
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+ return 0;
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+};
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+
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static int stfsm_wrvcr(struct stfsm *fsm, uint8_t data)
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{
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struct stfsm_seq *seq = &stfsm_seq_wrvcr;
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