|
@@ -35,10 +35,11 @@
|
|
#define REG_CTRL_STATUS BIT(2)
|
|
#define REG_CTRL_STATUS BIT(2)
|
|
#define REG_CTRL_ERROR BIT(3)
|
|
#define REG_CTRL_ERROR BIT(3)
|
|
#define REG_CTRL_CLKDIV_SHIFT 12
|
|
#define REG_CTRL_CLKDIV_SHIFT 12
|
|
-#define REG_CTRL_CLKDIV_MASK ((BIT(10) - 1) << REG_CTRL_CLKDIV_SHIFT)
|
|
|
|
|
|
+#define REG_CTRL_CLKDIV_MASK GENMASK(21, 12)
|
|
|
|
+#define REG_CTRL_CLKDIVEXT_SHIFT 28
|
|
|
|
+#define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28)
|
|
|
|
|
|
#define I2C_TIMEOUT_MS 500
|
|
#define I2C_TIMEOUT_MS 500
|
|
-#define DEFAULT_FREQ 100000
|
|
|
|
|
|
|
|
enum {
|
|
enum {
|
|
TOKEN_END = 0,
|
|
TOKEN_END = 0,
|
|
@@ -54,7 +55,6 @@ enum {
|
|
STATE_IDLE,
|
|
STATE_IDLE,
|
|
STATE_READ,
|
|
STATE_READ,
|
|
STATE_WRITE,
|
|
STATE_WRITE,
|
|
- STATE_STOP,
|
|
|
|
};
|
|
};
|
|
|
|
|
|
/**
|
|
/**
|
|
@@ -73,7 +73,6 @@ enum {
|
|
* @error: Flag set when an error is received
|
|
* @error: Flag set when an error is received
|
|
* @lock: To avoid race conditions between irq handler and xfer code
|
|
* @lock: To avoid race conditions between irq handler and xfer code
|
|
* @done: Completion used to wait for transfer termination
|
|
* @done: Completion used to wait for transfer termination
|
|
- * @frequency: Operating frequency of I2C bus clock
|
|
|
|
* @tokens: Sequence of tokens to be written to the device
|
|
* @tokens: Sequence of tokens to be written to the device
|
|
* @num_tokens: Number of tokens
|
|
* @num_tokens: Number of tokens
|
|
*/
|
|
*/
|
|
@@ -82,7 +81,6 @@ struct meson_i2c {
|
|
struct device *dev;
|
|
struct device *dev;
|
|
void __iomem *regs;
|
|
void __iomem *regs;
|
|
struct clk *clk;
|
|
struct clk *clk;
|
|
- int irq;
|
|
|
|
|
|
|
|
struct i2c_msg *msg;
|
|
struct i2c_msg *msg;
|
|
int state;
|
|
int state;
|
|
@@ -93,7 +91,6 @@ struct meson_i2c {
|
|
|
|
|
|
spinlock_t lock;
|
|
spinlock_t lock;
|
|
struct completion done;
|
|
struct completion done;
|
|
- unsigned int frequency;
|
|
|
|
u32 tokens[2];
|
|
u32 tokens[2];
|
|
int num_tokens;
|
|
int num_tokens;
|
|
};
|
|
};
|
|
@@ -126,23 +123,27 @@ static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
|
|
i2c->num_tokens++;
|
|
i2c->num_tokens++;
|
|
}
|
|
}
|
|
|
|
|
|
-static void meson_i2c_write_tokens(struct meson_i2c *i2c)
|
|
|
|
-{
|
|
|
|
- writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0);
|
|
|
|
- writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1);
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-static void meson_i2c_set_clk_div(struct meson_i2c *i2c)
|
|
|
|
|
|
+static void meson_i2c_set_clk_div(struct meson_i2c *i2c, unsigned int freq)
|
|
{
|
|
{
|
|
unsigned long clk_rate = clk_get_rate(i2c->clk);
|
|
unsigned long clk_rate = clk_get_rate(i2c->clk);
|
|
unsigned int div;
|
|
unsigned int div;
|
|
|
|
|
|
- div = DIV_ROUND_UP(clk_rate, i2c->frequency * 4);
|
|
|
|
|
|
+ div = DIV_ROUND_UP(clk_rate, freq * 4);
|
|
|
|
+
|
|
|
|
+ /* clock divider has 12 bits */
|
|
|
|
+ if (div >= (1 << 12)) {
|
|
|
|
+ dev_err(i2c->dev, "requested bus frequency too low\n");
|
|
|
|
+ div = (1 << 12) - 1;
|
|
|
|
+ }
|
|
|
|
+
|
|
meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK,
|
|
meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK,
|
|
- div << REG_CTRL_CLKDIV_SHIFT);
|
|
|
|
|
|
+ (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT);
|
|
|
|
+
|
|
|
|
+ meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK,
|
|
|
|
+ (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);
|
|
|
|
|
|
dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__,
|
|
dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__,
|
|
- clk_rate, i2c->frequency, div);
|
|
|
|
|
|
+ clk_rate, freq, div);
|
|
}
|
|
}
|
|
|
|
|
|
static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len)
|
|
static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len)
|
|
@@ -156,10 +157,10 @@ static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len)
|
|
dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
|
|
dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
|
|
rdata0, rdata1, len);
|
|
rdata0, rdata1, len);
|
|
|
|
|
|
- for (i = 0; i < min_t(int, 4, len); i++)
|
|
|
|
|
|
+ for (i = 0; i < min(4, len); i++)
|
|
*buf++ = (rdata0 >> i * 8) & 0xff;
|
|
*buf++ = (rdata0 >> i * 8) & 0xff;
|
|
|
|
|
|
- for (i = 4; i < min_t(int, 8, len); i++)
|
|
|
|
|
|
+ for (i = 4; i < min(8, len); i++)
|
|
*buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
|
|
*buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
|
|
}
|
|
}
|
|
|
|
|
|
@@ -168,10 +169,10 @@ static void meson_i2c_put_data(struct meson_i2c *i2c, char *buf, int len)
|
|
u32 wdata0 = 0, wdata1 = 0;
|
|
u32 wdata0 = 0, wdata1 = 0;
|
|
int i;
|
|
int i;
|
|
|
|
|
|
- for (i = 0; i < min_t(int, 4, len); i++)
|
|
|
|
|
|
+ for (i = 0; i < min(4, len); i++)
|
|
wdata0 |= *buf++ << (i * 8);
|
|
wdata0 |= *buf++ << (i * 8);
|
|
|
|
|
|
- for (i = 4; i < min_t(int, 8, len); i++)
|
|
|
|
|
|
+ for (i = 4; i < min(8, len); i++)
|
|
wdata1 |= *buf++ << ((i - 4) * 8);
|
|
wdata1 |= *buf++ << ((i - 4) * 8);
|
|
|
|
|
|
writel(wdata0, i2c->regs + REG_TOK_WDATA0);
|
|
writel(wdata0, i2c->regs + REG_TOK_WDATA0);
|
|
@@ -186,7 +187,7 @@ static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
|
|
bool write = !(i2c->msg->flags & I2C_M_RD);
|
|
bool write = !(i2c->msg->flags & I2C_M_RD);
|
|
int i;
|
|
int i;
|
|
|
|
|
|
- i2c->count = min_t(int, i2c->msg->len - i2c->pos, 8);
|
|
|
|
|
|
+ i2c->count = min(i2c->msg->len - i2c->pos, 8);
|
|
|
|
|
|
for (i = 0; i < i2c->count - 1; i++)
|
|
for (i = 0; i < i2c->count - 1; i++)
|
|
meson_i2c_add_token(i2c, TOKEN_DATA);
|
|
meson_i2c_add_token(i2c, TOKEN_DATA);
|
|
@@ -200,19 +201,12 @@ static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
|
|
|
|
|
|
if (write)
|
|
if (write)
|
|
meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
|
|
meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
|
|
-}
|
|
|
|
-
|
|
|
|
-static void meson_i2c_stop(struct meson_i2c *i2c)
|
|
|
|
-{
|
|
|
|
- dev_dbg(i2c->dev, "%s: last %d\n", __func__, i2c->last);
|
|
|
|
|
|
|
|
- if (i2c->last) {
|
|
|
|
- i2c->state = STATE_STOP;
|
|
|
|
|
|
+ if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len)
|
|
meson_i2c_add_token(i2c, TOKEN_STOP);
|
|
meson_i2c_add_token(i2c, TOKEN_STOP);
|
|
- } else {
|
|
|
|
- i2c->state = STATE_IDLE;
|
|
|
|
- complete(&i2c->done);
|
|
|
|
- }
|
|
|
|
|
|
+
|
|
|
|
+ writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0);
|
|
|
|
+ writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1);
|
|
}
|
|
}
|
|
|
|
|
|
static irqreturn_t meson_i2c_irq(int irqno, void *dev_id)
|
|
static irqreturn_t meson_i2c_irq(int irqno, void *dev_id)
|
|
@@ -223,12 +217,18 @@ static irqreturn_t meson_i2c_irq(int irqno, void *dev_id)
|
|
spin_lock(&i2c->lock);
|
|
spin_lock(&i2c->lock);
|
|
|
|
|
|
meson_i2c_reset_tokens(i2c);
|
|
meson_i2c_reset_tokens(i2c);
|
|
|
|
+ meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
|
|
ctrl = readl(i2c->regs + REG_CTRL);
|
|
ctrl = readl(i2c->regs + REG_CTRL);
|
|
|
|
|
|
dev_dbg(i2c->dev, "irq: state %d, pos %d, count %d, ctrl %08x\n",
|
|
dev_dbg(i2c->dev, "irq: state %d, pos %d, count %d, ctrl %08x\n",
|
|
i2c->state, i2c->pos, i2c->count, ctrl);
|
|
i2c->state, i2c->pos, i2c->count, ctrl);
|
|
|
|
|
|
- if (ctrl & REG_CTRL_ERROR && i2c->state != STATE_IDLE) {
|
|
|
|
|
|
+ if (i2c->state == STATE_IDLE) {
|
|
|
|
+ spin_unlock(&i2c->lock);
|
|
|
|
+ return IRQ_NONE;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (ctrl & REG_CTRL_ERROR) {
|
|
/*
|
|
/*
|
|
* The bit is set when the IGNORE_NAK bit is cleared
|
|
* The bit is set when the IGNORE_NAK bit is cleared
|
|
* and the device didn't respond. In this case, the
|
|
* and the device didn't respond. In this case, the
|
|
@@ -242,48 +242,21 @@ static irqreturn_t meson_i2c_irq(int irqno, void *dev_id)
|
|
goto out;
|
|
goto out;
|
|
}
|
|
}
|
|
|
|
|
|
- switch (i2c->state) {
|
|
|
|
- case STATE_READ:
|
|
|
|
- if (i2c->count > 0) {
|
|
|
|
- meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos,
|
|
|
|
- i2c->count);
|
|
|
|
- i2c->pos += i2c->count;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- if (i2c->pos >= i2c->msg->len) {
|
|
|
|
- meson_i2c_stop(i2c);
|
|
|
|
- break;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- meson_i2c_prepare_xfer(i2c);
|
|
|
|
- break;
|
|
|
|
- case STATE_WRITE:
|
|
|
|
- i2c->pos += i2c->count;
|
|
|
|
|
|
+ if (i2c->state == STATE_READ && i2c->count)
|
|
|
|
+ meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
|
|
|
|
|
|
- if (i2c->pos >= i2c->msg->len) {
|
|
|
|
- meson_i2c_stop(i2c);
|
|
|
|
- break;
|
|
|
|
- }
|
|
|
|
|
|
+ i2c->pos += i2c->count;
|
|
|
|
|
|
- meson_i2c_prepare_xfer(i2c);
|
|
|
|
- break;
|
|
|
|
- case STATE_STOP:
|
|
|
|
|
|
+ if (i2c->pos >= i2c->msg->len) {
|
|
i2c->state = STATE_IDLE;
|
|
i2c->state = STATE_IDLE;
|
|
complete(&i2c->done);
|
|
complete(&i2c->done);
|
|
- break;
|
|
|
|
- case STATE_IDLE:
|
|
|
|
- break;
|
|
|
|
|
|
+ goto out;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+ /* Restart the processing */
|
|
|
|
+ meson_i2c_prepare_xfer(i2c);
|
|
|
|
+ meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START);
|
|
out:
|
|
out:
|
|
- if (i2c->state != STATE_IDLE) {
|
|
|
|
- /* Restart the processing */
|
|
|
|
- meson_i2c_write_tokens(i2c);
|
|
|
|
- meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
|
|
|
|
- meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START,
|
|
|
|
- REG_CTRL_START);
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
spin_unlock(&i2c->lock);
|
|
spin_unlock(&i2c->lock);
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
return IRQ_HANDLED;
|
|
@@ -323,7 +296,6 @@ static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg,
|
|
|
|
|
|
i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
|
|
i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
|
|
meson_i2c_prepare_xfer(i2c);
|
|
meson_i2c_prepare_xfer(i2c);
|
|
- meson_i2c_write_tokens(i2c);
|
|
|
|
reinit_completion(&i2c->done);
|
|
reinit_completion(&i2c->done);
|
|
|
|
|
|
/* Start the transfer */
|
|
/* Start the transfer */
|
|
@@ -359,21 +331,19 @@ static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
|
|
int num)
|
|
int num)
|
|
{
|
|
{
|
|
struct meson_i2c *i2c = adap->algo_data;
|
|
struct meson_i2c *i2c = adap->algo_data;
|
|
- int i, ret = 0, count = 0;
|
|
|
|
|
|
+ int i, ret = 0;
|
|
|
|
|
|
clk_enable(i2c->clk);
|
|
clk_enable(i2c->clk);
|
|
- meson_i2c_set_clk_div(i2c);
|
|
|
|
|
|
|
|
for (i = 0; i < num; i++) {
|
|
for (i = 0; i < num; i++) {
|
|
ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1);
|
|
ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1);
|
|
if (ret)
|
|
if (ret)
|
|
break;
|
|
break;
|
|
- count++;
|
|
|
|
}
|
|
}
|
|
|
|
|
|
clk_disable(i2c->clk);
|
|
clk_disable(i2c->clk);
|
|
|
|
|
|
- return ret ? ret : count;
|
|
|
|
|
|
+ return ret ?: i;
|
|
}
|
|
}
|
|
|
|
|
|
static u32 meson_i2c_func(struct i2c_adapter *adap)
|
|
static u32 meson_i2c_func(struct i2c_adapter *adap)
|
|
@@ -391,15 +361,14 @@ static int meson_i2c_probe(struct platform_device *pdev)
|
|
struct device_node *np = pdev->dev.of_node;
|
|
struct device_node *np = pdev->dev.of_node;
|
|
struct meson_i2c *i2c;
|
|
struct meson_i2c *i2c;
|
|
struct resource *mem;
|
|
struct resource *mem;
|
|
- int ret = 0;
|
|
|
|
|
|
+ struct i2c_timings timings;
|
|
|
|
+ int irq, ret = 0;
|
|
|
|
|
|
i2c = devm_kzalloc(&pdev->dev, sizeof(struct meson_i2c), GFP_KERNEL);
|
|
i2c = devm_kzalloc(&pdev->dev, sizeof(struct meson_i2c), GFP_KERNEL);
|
|
if (!i2c)
|
|
if (!i2c)
|
|
return -ENOMEM;
|
|
return -ENOMEM;
|
|
|
|
|
|
- if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
|
|
|
|
- &i2c->frequency))
|
|
|
|
- i2c->frequency = DEFAULT_FREQ;
|
|
|
|
|
|
+ i2c_parse_fw_timings(&pdev->dev, &timings, true);
|
|
|
|
|
|
i2c->dev = &pdev->dev;
|
|
i2c->dev = &pdev->dev;
|
|
platform_set_drvdata(pdev, i2c);
|
|
platform_set_drvdata(pdev, i2c);
|
|
@@ -418,14 +387,13 @@ static int meson_i2c_probe(struct platform_device *pdev)
|
|
if (IS_ERR(i2c->regs))
|
|
if (IS_ERR(i2c->regs))
|
|
return PTR_ERR(i2c->regs);
|
|
return PTR_ERR(i2c->regs);
|
|
|
|
|
|
- i2c->irq = platform_get_irq(pdev, 0);
|
|
|
|
- if (i2c->irq < 0) {
|
|
|
|
|
|
+ irq = platform_get_irq(pdev, 0);
|
|
|
|
+ if (irq < 0) {
|
|
dev_err(&pdev->dev, "can't find IRQ\n");
|
|
dev_err(&pdev->dev, "can't find IRQ\n");
|
|
- return i2c->irq;
|
|
|
|
|
|
+ return irq;
|
|
}
|
|
}
|
|
|
|
|
|
- ret = devm_request_irq(&pdev->dev, i2c->irq, meson_i2c_irq,
|
|
|
|
- 0, dev_name(&pdev->dev), i2c);
|
|
|
|
|
|
+ ret = devm_request_irq(&pdev->dev, irq, meson_i2c_irq, 0, NULL, i2c);
|
|
if (ret < 0) {
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "can't request IRQ\n");
|
|
dev_err(&pdev->dev, "can't request IRQ\n");
|
|
return ret;
|
|
return ret;
|
|
@@ -457,6 +425,8 @@ static int meson_i2c_probe(struct platform_device *pdev)
|
|
return ret;
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+ meson_i2c_set_clk_div(i2c, timings.bus_freq_hz);
|
|
|
|
+
|
|
return 0;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
|