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@@ -190,25 +190,6 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
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tegra_host->ddr_signaling = false;
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}
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-static void tegra_sdhci_set_bus_width(struct sdhci_host *host, int bus_width)
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-{
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- u32 ctrl;
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-
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- ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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- if ((host->mmc->caps & MMC_CAP_8_BIT_DATA) &&
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- (bus_width == MMC_BUS_WIDTH_8)) {
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- ctrl &= ~SDHCI_CTRL_4BITBUS;
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- ctrl |= SDHCI_CTRL_8BITBUS;
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- } else {
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- ctrl &= ~SDHCI_CTRL_8BITBUS;
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- if (bus_width == MMC_BUS_WIDTH_4)
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- ctrl |= SDHCI_CTRL_4BITBUS;
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- else
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- ctrl &= ~SDHCI_CTRL_4BITBUS;
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- }
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- sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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-}
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-
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static void tegra_sdhci_pad_autocalib(struct sdhci_host *host)
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{
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u32 val;
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@@ -323,7 +304,7 @@ static const struct sdhci_ops tegra_sdhci_ops = {
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.read_w = tegra_sdhci_readw,
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.write_l = tegra_sdhci_writel,
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.set_clock = tegra_sdhci_set_clock,
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- .set_bus_width = tegra_sdhci_set_bus_width,
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+ .set_bus_width = sdhci_set_bus_width,
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.reset = tegra_sdhci_reset,
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.platform_execute_tuning = tegra_sdhci_execute_tuning,
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.set_uhs_signaling = tegra_sdhci_set_uhs_signaling,
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@@ -371,7 +352,7 @@ static const struct sdhci_ops tegra114_sdhci_ops = {
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.write_w = tegra_sdhci_writew,
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.write_l = tegra_sdhci_writel,
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.set_clock = tegra_sdhci_set_clock,
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- .set_bus_width = tegra_sdhci_set_bus_width,
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+ .set_bus_width = sdhci_set_bus_width,
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.reset = tegra_sdhci_reset,
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.platform_execute_tuning = tegra_sdhci_execute_tuning,
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.set_uhs_signaling = tegra_sdhci_set_uhs_signaling,
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