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@@ -541,14 +541,14 @@ int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait)
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return 0;
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}
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-/*
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- * Force the mode of the controller.
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+/**
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+ * dwc2_force_mode() - Force the mode of the controller.
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*
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* Forcing the mode is needed for two cases:
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*
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* 1) If the dr_mode is set to either HOST or PERIPHERAL we force the
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* controller to stay in a particular mode regardless of ID pin
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- * changes. We do this usually after a core reset.
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+ * changes. We do this once during probe.
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*
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* 2) During probe we want to read reset values of the hw
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* configuration registers that are only available in either host or
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@@ -565,7 +565,7 @@ int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait)
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* the filter is configured and enabled. We poll the current mode of
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* the controller to account for this delay.
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*/
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-static bool dwc2_force_mode(struct dwc2_hsotg *hsotg, bool host)
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+void dwc2_force_mode(struct dwc2_hsotg *hsotg, bool host)
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{
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u32 gusbcfg;
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u32 set;
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@@ -577,17 +577,17 @@ static bool dwc2_force_mode(struct dwc2_hsotg *hsotg, bool host)
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* Force mode has no effect if the hardware is not OTG.
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*/
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if (!dwc2_hw_is_otg(hsotg))
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- return false;
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+ return;
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/*
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* If dr_mode is either peripheral or host only, there is no
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* need to ever force the mode to the opposite mode.
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*/
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if (WARN_ON(host && hsotg->dr_mode == USB_DR_MODE_PERIPHERAL))
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- return false;
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+ return;
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if (WARN_ON(!host && hsotg->dr_mode == USB_DR_MODE_HOST))
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- return false;
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+ return;
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gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
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@@ -599,7 +599,7 @@ static bool dwc2_force_mode(struct dwc2_hsotg *hsotg, bool host)
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dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG);
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dwc2_wait_for_mode(hsotg, host);
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- return true;
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+ return;
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}
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/**
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@@ -615,6 +615,11 @@ void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
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{
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u32 gusbcfg;
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+ if (!dwc2_hw_is_otg(hsotg))
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+ return;
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+
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+ dev_dbg(hsotg->dev, "Clearing force mode bits\n");
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+
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gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
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gusbcfg &= ~GUSBCFG_FORCEHOSTMODE;
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gusbcfg &= ~GUSBCFG_FORCEDEVMODE;
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@@ -629,16 +634,13 @@ void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
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*/
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void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg)
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{
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- bool ret;
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-
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switch (hsotg->dr_mode) {
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case USB_DR_MODE_HOST:
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- ret = dwc2_force_mode(hsotg, true);
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/*
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* NOTE: This is required for some rockchip soc based
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* platforms on their host-only dwc2.
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*/
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- if (!ret)
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+ if (!dwc2_hw_is_otg(hsotg))
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msleep(50);
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break;
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@@ -655,25 +657,6 @@ void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg)
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}
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}
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-/*
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- * Do core a soft reset of the core. Be careful with this because it
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- * resets all the internal state machines of the core.
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- *
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- * Additionally this will apply force mode as per the hsotg->dr_mode
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- * parameter.
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- */
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-int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg)
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-{
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- int retval;
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-
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- retval = dwc2_core_reset(hsotg, false);
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- if (retval)
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- return retval;
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-
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- dwc2_force_dr_mode(hsotg);
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- return 0;
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-}
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-
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/*
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* dwc2_enable_acg - enable active clock gating feature
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*/
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@@ -910,22 +893,6 @@ void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg)
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udelay(1);
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}
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-/*
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- * Forces either host or device mode if the controller is not
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- * currently in that mode.
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- *
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- * Returns true if the mode was forced.
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- */
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-bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host)
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-{
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- if (host && dwc2_is_host_mode(hsotg))
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- return false;
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- else if (!host && dwc2_is_device_mode(hsotg))
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- return false;
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-
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- return dwc2_force_mode(hsotg, host);
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-}
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-
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bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg)
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{
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if (dwc2_readl(hsotg->regs + GSNPSID) == 0xffffffff)
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