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@@ -22,6 +22,7 @@
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#include "pmc.h"
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#define PMC_MAX_IDS 128
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+#define PMC_MAX_PCKS 8
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int of_at91_get_clk_range(struct device_node *np, const char *propname,
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struct clk_range *range)
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@@ -50,6 +51,7 @@ EXPORT_SYMBOL_GPL(of_at91_get_clk_range);
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static struct regmap *pmcreg;
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static u8 registered_ids[PMC_MAX_IDS];
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+static u8 registered_pcks[PMC_MAX_PCKS];
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static struct
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{
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@@ -66,8 +68,13 @@ static struct
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u32 pcr[PMC_MAX_IDS];
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u32 audio_pll0;
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u32 audio_pll1;
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+ u32 pckr[PMC_MAX_PCKS];
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} pmc_cache;
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+/*
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+ * As Peripheral ID 0 is invalid on AT91 chips, the identifier is stored
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+ * without alteration in the table, and 0 is for unused clocks.
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+ */
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void pmc_register_id(u8 id)
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{
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int i;
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@@ -82,9 +89,28 @@ void pmc_register_id(u8 id)
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}
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}
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+/*
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+ * As Programmable Clock 0 is valid on AT91 chips, there is an offset
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+ * of 1 between the stored value and the real clock ID.
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+ */
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+void pmc_register_pck(u8 pck)
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+{
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+ int i;
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+
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+ for (i = 0; i < PMC_MAX_PCKS; i++) {
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+ if (registered_pcks[i] == 0) {
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+ registered_pcks[i] = pck + 1;
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+ break;
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+ }
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+ if (registered_pcks[i] == (pck + 1))
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+ break;
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+ }
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+}
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+
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static int pmc_suspend(void)
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{
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int i;
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+ u8 num;
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regmap_read(pmcreg, AT91_PMC_SCSR, &pmc_cache.scsr);
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regmap_read(pmcreg, AT91_PMC_PCSR, &pmc_cache.pcsr0);
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@@ -103,6 +129,10 @@ static int pmc_suspend(void)
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regmap_read(pmcreg, AT91_PMC_PCR,
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&pmc_cache.pcr[registered_ids[i]]);
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}
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+ for (i = 0; registered_pcks[i]; i++) {
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+ num = registered_pcks[i] - 1;
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+ regmap_read(pmcreg, AT91_PMC_PCKR(num), &pmc_cache.pckr[num]);
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+ }
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return 0;
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}
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@@ -119,6 +149,7 @@ static bool pmc_ready(unsigned int mask)
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static void pmc_resume(void)
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{
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int i;
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+ u8 num;
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u32 tmp;
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u32 mask = AT91_PMC_MCKRDY | AT91_PMC_LOCKA;
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@@ -143,6 +174,10 @@ static void pmc_resume(void)
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pmc_cache.pcr[registered_ids[i]] |
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AT91_PMC_PCR_CMD);
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}
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+ for (i = 0; registered_pcks[i]; i++) {
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+ num = registered_pcks[i] - 1;
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+ regmap_write(pmcreg, AT91_PMC_PCKR(num), pmc_cache.pckr[num]);
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+ }
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if (pmc_cache.uckr & AT91_PMC_UPLLEN)
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mask |= AT91_PMC_LOCKU;
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