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@@ -46,6 +46,14 @@ static const struct {
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},
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};
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+/* return pixels equvalent to txbyteclkhs */
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+static u16 pixels_from_txbyteclkhs(u16 clk_hs, int bpp, int lane_count,
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+ u16 burst_mode_ratio)
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+{
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+ return DIV_ROUND_UP((clk_hs * lane_count * 8 * 100),
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+ (bpp * burst_mode_ratio));
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+}
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+
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enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt)
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{
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/* It just so happens the VBT matches register contents. */
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@@ -781,9 +789,10 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder,
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struct drm_display_mode *adjusted_mode =
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&pipe_config->base.adjusted_mode;
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struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
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+ unsigned int lane_count = intel_dsi->lane_count;
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unsigned int bpp, fmt;
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enum port port;
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- u16 vfp, vsync, vbp;
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+ u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;
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/*
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* Atleast one port is active as encoder->get_config called only if
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@@ -808,22 +817,43 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder,
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adjusted_mode->crtc_vtotal =
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I915_READ(BXT_MIPI_TRANS_VTOTAL(port));
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+ hactive = adjusted_mode->crtc_hdisplay;
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+ hfp = I915_READ(MIPI_HFP_COUNT(port));
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+
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/*
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- * TODO: Retrieve hfp, hsync and hbp. Adjust them for dual link and
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- * calculate hsync_start, hsync_end, htotal and hblank_end
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+ * Meaningful for video mode non-burst sync pulse mode only,
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+ * can be zero for non-burst sync events and burst modes
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*/
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+ hsync = I915_READ(MIPI_HSYNC_PADDING_COUNT(port));
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+ hbp = I915_READ(MIPI_HBP_COUNT(port));
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+
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+ /* harizontal values are in terms of high speed byte clock */
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+ hfp = pixels_from_txbyteclkhs(hfp, bpp, lane_count,
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+ intel_dsi->burst_mode_ratio);
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+ hsync = pixels_from_txbyteclkhs(hsync, bpp, lane_count,
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+ intel_dsi->burst_mode_ratio);
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+ hbp = pixels_from_txbyteclkhs(hbp, bpp, lane_count,
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+ intel_dsi->burst_mode_ratio);
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+
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+ if (intel_dsi->dual_link) {
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+ hfp *= 2;
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+ hsync *= 2;
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+ hbp *= 2;
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+ }
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/* vertical values are in terms of lines */
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vfp = I915_READ(MIPI_VFP_COUNT(port));
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vsync = I915_READ(MIPI_VSYNC_PADDING_COUNT(port));
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vbp = I915_READ(MIPI_VBP_COUNT(port));
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+ adjusted_mode->crtc_htotal = hactive + hfp + hsync + hbp;
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+ adjusted_mode->crtc_hsync_start = hfp + adjusted_mode->crtc_hdisplay;
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+ adjusted_mode->crtc_hsync_end = hsync + adjusted_mode->crtc_hsync_start;
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adjusted_mode->crtc_hblank_start = adjusted_mode->crtc_hdisplay;
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+ adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_htotal;
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- adjusted_mode->crtc_vsync_start =
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- vfp + adjusted_mode->crtc_vdisplay;
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- adjusted_mode->crtc_vsync_end =
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- vsync + adjusted_mode->crtc_vsync_start;
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+ adjusted_mode->crtc_vsync_start = vfp + adjusted_mode->crtc_vdisplay;
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+ adjusted_mode->crtc_vsync_end = vsync + adjusted_mode->crtc_vsync_start;
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adjusted_mode->crtc_vblank_start = adjusted_mode->crtc_vdisplay;
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adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal;
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}
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Ramalingam C