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@@ -0,0 +1,25 @@
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+* Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
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+
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+RTC controller for the Xilinx Zynq MPSoC Real Time Clock
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+Separate IRQ lines for seconds and alarm
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+
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+Required properties:
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+- compatible: Should be "xlnx,zynqmp-rtc"
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+- reg: Physical base address of the controller and length
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+ of memory mapped region.
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+- interrupts: IRQ lines for the RTC.
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+- interrupt-names: interrupt line names eg. "sec" "alarm"
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+
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+Optional:
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+- calibration: calibration value for 1 sec period which will
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+ be programmed directly to calibration register
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+
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+Example:
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+rtc: rtc@ffa60000 {
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+ compatible = "xlnx,zynqmp-rtc";
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+ reg = <0x0 0xffa60000 0x100>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 26 4>, <0 27 4>;
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+ interrupt-names = "alarm", "sec";
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+ calibration = <0x198233>;
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+};
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