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@@ -148,18 +148,6 @@ static uint32_t audio_config_setup_n_reg(int n, uint32_t val)
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return tmp;
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}
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-/* check whether N/CTS/M need be set manually */
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-static bool audio_rate_need_prog(struct intel_crtc *crtc,
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- const struct drm_display_mode *mode)
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-{
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- if (((mode->clock == TMDS_297M) ||
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- (mode->clock == TMDS_296M)) &&
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- intel_crtc_has_type(crtc->config, INTEL_OUTPUT_HDMI))
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- return true;
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- else
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- return false;
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-}
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-
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static bool intel_eld_uptodate(struct drm_connector *connector,
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i915_reg_t reg_eldv, uint32_t bits_eldv,
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i915_reg_t reg_elda, uint32_t bits_elda,
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@@ -245,9 +233,26 @@ static void g4x_audio_codec_enable(struct drm_connector *connector,
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I915_WRITE(G4X_AUD_CNTL_ST, tmp);
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}
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-static void hsw_audio_config_update(struct intel_crtc *intel_crtc,
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- enum port port,
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- const struct drm_display_mode *adjusted_mode)
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+static void
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+hsw_dp_audio_config_update(struct intel_crtc *intel_crtc, enum port port,
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+ const struct drm_display_mode *adjusted_mode)
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+{
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+ struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
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+ enum pipe pipe = intel_crtc->pipe;
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+ u32 tmp;
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+
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+ tmp = I915_READ(HSW_AUD_CFG(pipe));
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+ tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
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+ tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
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+ tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
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+ tmp |= AUD_CONFIG_N_VALUE_INDEX;
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+
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+ I915_WRITE(HSW_AUD_CFG(pipe), tmp);
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+}
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+
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+static void
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+hsw_hdmi_audio_config_update(struct intel_crtc *intel_crtc, enum port port,
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+ const struct drm_display_mode *adjusted_mode)
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{
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struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
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struct i915_audio_component *acomp = dev_priv->audio_component;
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@@ -259,13 +264,11 @@ static void hsw_audio_config_update(struct intel_crtc *intel_crtc,
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tmp = I915_READ(HSW_AUD_CFG(pipe));
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tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
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tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
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- if (intel_crtc_has_dp_encoder(intel_crtc->config))
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- tmp |= AUD_CONFIG_N_VALUE_INDEX;
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- else
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- tmp |= audio_config_hdmi_pixel_clock(adjusted_mode);
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-
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tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
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- if (audio_rate_need_prog(intel_crtc, adjusted_mode)) {
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+ tmp |= audio_config_hdmi_pixel_clock(adjusted_mode);
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+
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+ if (adjusted_mode->clock == TMDS_296M ||
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+ adjusted_mode->clock == TMDS_297M) {
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n = audio_config_get_n(adjusted_mode, rate);
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if (n != 0)
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tmp = audio_config_setup_n_reg(n, tmp);
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@@ -276,6 +279,16 @@ static void hsw_audio_config_update(struct intel_crtc *intel_crtc,
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I915_WRITE(HSW_AUD_CFG(pipe), tmp);
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}
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+static void
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+hsw_audio_config_update(struct intel_crtc *intel_crtc, enum port port,
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+ const struct drm_display_mode *adjusted_mode)
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+{
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+ if (intel_crtc_has_dp_encoder(intel_crtc->config))
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+ hsw_dp_audio_config_update(intel_crtc, port, adjusted_mode);
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+ else
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+ hsw_hdmi_audio_config_update(intel_crtc, port, adjusted_mode);
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+}
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+
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static void hsw_audio_codec_disable(struct intel_encoder *encoder)
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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