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@@ -60,7 +60,7 @@
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#define _PAGE_EXECUTE (1<<3) /* Page has user execute perm (H) */
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#define _PAGE_WRITE (1<<4) /* Page has user write perm (H) */
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#define _PAGE_READ (1<<5) /* Page has user read perm (H) */
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-#define _PAGE_MODIFIED (1<<6) /* Page modified (dirty) (S) */
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+#define _PAGE_DIRTY (1<<6) /* Page modified (dirty) (S) */
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#define _PAGE_GLOBAL (1<<8) /* Page is global (H) */
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#define _PAGE_PRESENT (1<<10) /* TLB entry is valid (H) */
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@@ -71,7 +71,7 @@
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#define _PAGE_WRITE (1<<2) /* Page has user write perm (H) */
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#define _PAGE_READ (1<<3) /* Page has user read perm (H) */
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#define _PAGE_ACCESSED (1<<4) /* Page is accessed (S) */
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-#define _PAGE_MODIFIED (1<<5) /* Page modified (dirty) (S) */
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+#define _PAGE_DIRTY (1<<5) /* Page modified (dirty) (S) */
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#if (CONFIG_ARC_MMU_VER >= 4)
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#define _PAGE_WTHRU (1<<7) /* Page cache mode write-thru (H) */
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@@ -92,21 +92,16 @@
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#define _K_PAGE_PERMS (_PAGE_EXECUTE | _PAGE_WRITE | _PAGE_READ | \
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_PAGE_GLOBAL | _PAGE_PRESENT)
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-#ifdef CONFIG_ARC_CACHE_PAGES
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-#define _PAGE_DEF_CACHEABLE _PAGE_CACHEABLE
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-#else
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-#define _PAGE_DEF_CACHEABLE (0)
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+#ifndef CONFIG_ARC_CACHE_PAGES
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+#undef _PAGE_CACHEABLE
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+#define _PAGE_CACHEABLE 0
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#endif
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-/* Helper for every "user" page
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- * -kernel can R/W/X
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- * -by default cached, unless config otherwise
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- * -present in memory
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- */
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-#define ___DEF (_PAGE_PRESENT | _PAGE_DEF_CACHEABLE)
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+/* Defaults for every user page */
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+#define ___DEF (_PAGE_PRESENT | _PAGE_CACHEABLE)
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/* Set of bits not changed in pte_modify */
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-#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED)
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+#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
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/* More Abbrevaited helpers */
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#define PAGE_U_NONE __pgprot(___DEF)
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@@ -122,7 +117,7 @@
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* user vaddr space - visible in all addr spaces, but kernel mode only
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* Thus Global, all-kernel-access, no-user-access, cached
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*/
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-#define PAGE_KERNEL __pgprot(_K_PAGE_PERMS | _PAGE_DEF_CACHEABLE)
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+#define PAGE_KERNEL __pgprot(_K_PAGE_PERMS | _PAGE_CACHEABLE)
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/* ioremap */
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#define PAGE_KERNEL_NO_CACHE __pgprot(_K_PAGE_PERMS)
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@@ -191,16 +186,16 @@
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/* Optimal Sizing of Pg Tbl - based on MMU page size */
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#if defined(CONFIG_ARC_PAGE_SIZE_8K)
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-#define BITS_FOR_PTE 8
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+#define BITS_FOR_PTE 8 /* 11:8:13 */
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#elif defined(CONFIG_ARC_PAGE_SIZE_16K)
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-#define BITS_FOR_PTE 8
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+#define BITS_FOR_PTE 8 /* 10:8:14 */
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#elif defined(CONFIG_ARC_PAGE_SIZE_4K)
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-#define BITS_FOR_PTE 9
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+#define BITS_FOR_PTE 9 /* 11:9:12 */
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#endif
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#define BITS_FOR_PGD (32 - BITS_FOR_PTE - BITS_IN_PAGE)
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-#define PGDIR_SHIFT (BITS_FOR_PTE + BITS_IN_PAGE)
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+#define PGDIR_SHIFT (32 - BITS_FOR_PGD)
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT) /* vaddr span, not PDG sz */
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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@@ -295,7 +290,7 @@ static inline void pmd_set(pmd_t *pmdp, pte_t *ptep)
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/* Zoo of pte_xxx function */
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#define pte_read(pte) (pte_val(pte) & _PAGE_READ)
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#define pte_write(pte) (pte_val(pte) & _PAGE_WRITE)
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-#define pte_dirty(pte) (pte_val(pte) & _PAGE_MODIFIED)
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+#define pte_dirty(pte) (pte_val(pte) & _PAGE_DIRTY)
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#define pte_young(pte) (pte_val(pte) & _PAGE_ACCESSED)
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#define pte_special(pte) (0)
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@@ -304,8 +299,8 @@ static inline void pmd_set(pmd_t *pmdp, pte_t *ptep)
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PTE_BIT_FUNC(wrprotect, &= ~(_PAGE_WRITE));
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PTE_BIT_FUNC(mkwrite, |= (_PAGE_WRITE));
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-PTE_BIT_FUNC(mkclean, &= ~(_PAGE_MODIFIED));
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-PTE_BIT_FUNC(mkdirty, |= (_PAGE_MODIFIED));
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+PTE_BIT_FUNC(mkclean, &= ~(_PAGE_DIRTY));
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+PTE_BIT_FUNC(mkdirty, |= (_PAGE_DIRTY));
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PTE_BIT_FUNC(mkold, &= ~(_PAGE_ACCESSED));
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PTE_BIT_FUNC(mkyoung, |= (_PAGE_ACCESSED));
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PTE_BIT_FUNC(exprotect, &= ~(_PAGE_EXECUTE));
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