|
@@ -318,7 +318,7 @@
|
|
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
|
|
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
|
|
clock-names = "baudclk", "apb_pclk";
|
|
clock-names = "baudclk", "apb_pclk";
|
|
dmas = <&dmac 2>, <&dmac 3>;
|
|
dmas = <&dmac 2>, <&dmac 3>;
|
|
- #dma-cells = <2>;
|
|
|
|
|
|
+ dma-names = "tx", "rx";
|
|
pinctrl-names = "default";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
|
|
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
|
|
reg-io-width = <4>;
|
|
reg-io-width = <4>;
|
|
@@ -333,7 +333,7 @@
|
|
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
|
|
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
|
|
clock-names = "sclk_uart", "pclk_uart";
|
|
clock-names = "sclk_uart", "pclk_uart";
|
|
dmas = <&dmac 4>, <&dmac 5>;
|
|
dmas = <&dmac 4>, <&dmac 5>;
|
|
- #dma-cells = <2>;
|
|
|
|
|
|
+ dma-names = "tx", "rx";
|
|
pinctrl-names = "default";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
|
|
pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
|
|
reg-io-width = <4>;
|
|
reg-io-width = <4>;
|
|
@@ -348,7 +348,7 @@
|
|
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
|
|
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
|
|
clock-names = "baudclk", "apb_pclk";
|
|
clock-names = "baudclk", "apb_pclk";
|
|
dmas = <&dmac 6>, <&dmac 7>;
|
|
dmas = <&dmac 6>, <&dmac 7>;
|
|
- #dma-cells = <2>;
|
|
|
|
|
|
+ dma-names = "tx", "rx";
|
|
pinctrl-names = "default";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart2m1_xfer>;
|
|
pinctrl-0 = <&uart2m1_xfer>;
|
|
reg-io-width = <4>;
|
|
reg-io-width = <4>;
|