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@@ -295,28 +295,3 @@ void dce6_dp_audio_set_dto(struct radeon_device *rdev,
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WREG32(DCCG_AUDIO_DTO1_MODULE, clock);
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}
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}
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-
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-void dce6_dp_enable(struct drm_encoder *encoder, bool enable)
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-{
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- struct drm_device *dev = encoder->dev;
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- struct radeon_device *rdev = dev->dev_private;
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- struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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- struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
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-
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- if (!dig || !dig->afmt)
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- return;
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-
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- if (enable) {
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- WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,
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- EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));
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- WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset,
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- EVERGREEN_DP_SEC_ASP_ENABLE | /* Audio packet transmission */
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- EVERGREEN_DP_SEC_ATP_ENABLE | /* Audio timestamp packet transmission */
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- EVERGREEN_DP_SEC_AIP_ENABLE | /* Audio infoframe packet transmission */
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- EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */
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- } else {
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- WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);
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- }
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-
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- dig->afmt->enabled = enable;
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-}
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