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@@ -53,13 +53,6 @@
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((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 : \
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((pgsz) == MMU_CAM_PGSZ_4K) ? 0xfffff000 : 0)
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-/* IOMMU errors */
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-#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
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-#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
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-#define OMAP_IOMMU_ERR_EMU_MISS (1 << 2)
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-#define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3)
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-#define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4)
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-
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static void __iommu_set_twl(struct omap_iommu *obj, bool on)
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{
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u32 l = iommu_read_reg(obj, MMU_CNTL);
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@@ -122,7 +115,6 @@ static void omap2_iommu_set_twl(struct omap_iommu *obj, bool on)
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static u32 omap2_iommu_fault_isr(struct omap_iommu *obj, u32 *ra)
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{
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u32 stat, da;
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- u32 errs = 0;
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stat = iommu_read_reg(obj, MMU_IRQSTATUS);
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stat &= MMU_IRQ_MASK;
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@@ -134,19 +126,9 @@ static u32 omap2_iommu_fault_isr(struct omap_iommu *obj, u32 *ra)
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da = iommu_read_reg(obj, MMU_FAULT_AD);
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*ra = da;
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- if (stat & MMU_IRQ_TLBMISS)
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- errs |= OMAP_IOMMU_ERR_TLB_MISS;
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- if (stat & MMU_IRQ_TRANSLATIONFAULT)
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- errs |= OMAP_IOMMU_ERR_TRANS_FAULT;
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- if (stat & MMU_IRQ_EMUMISS)
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- errs |= OMAP_IOMMU_ERR_EMU_MISS;
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- if (stat & MMU_IRQ_TABLEWALKFAULT)
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- errs |= OMAP_IOMMU_ERR_TBLWALK_FAULT;
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- if (stat & MMU_IRQ_MULTIHITFAULT)
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- errs |= OMAP_IOMMU_ERR_MULTIHIT_FAULT;
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iommu_write_reg(obj, stat, MMU_IRQSTATUS);
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- return errs;
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+ return stat;
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}
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static void omap2_tlb_read_cr(struct omap_iommu *obj, struct cr_regs *cr)
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