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@@ -245,18 +245,18 @@ struct slic_hddr_wds {
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} hdrs_14port;
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struct {
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u32 frame_status;
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- u16 ByteCnt;
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- u16 TpChksum;
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- u16 CtxHash;
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- u16 MacHash;
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- u32 BufLnk;
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+ u16 byte_cnt;
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+ u16 tp_chksum;
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+ u16 ctx_hash;
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+ u16 mac_hash;
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+ u32 buf_lnk;
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} hdrs_gbit;
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} u0;
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};
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#define frame_status14 u0.hdrs_14port.frame_status
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#define frame_status_b14 u0.hdrs_14port.frame_status_b
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-#define frame_statusGB u0.hdrs_gbit.frame_status
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+#define frame_status_gb u0.hdrs_gbit.frame_status
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struct slic_host64sg {
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u32 paddrl;
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@@ -460,7 +460,7 @@ struct slic_pnp_capabilities {
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};
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struct slic_config_mac {
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- u8 macaddrA[6];
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+ u8 macaddr_a[6];
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};
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#define ATK_FRU_FORMAT 0x00
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@@ -520,56 +520,56 @@ union oemfru {
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* SLIC EEPROM structure for Mojave
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*/
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struct slic_eeprom {
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- u16 Id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/
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- u16 EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
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- u16 FlashSize; /* 02 Flash size */
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- u16 EepromSize; /* 03 EEPROM Size */
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- u16 VendorId; /* 04 Vendor ID */
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- u16 DeviceId; /* 05 Device ID */
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- u8 RevisionId; /* 06 Revision ID */
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- u8 ClassCode[3]; /* 07 Class Code */
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- u8 DbgIntPin; /* 08 Debug Interrupt pin */
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- u8 NetIntPin0; /* Network Interrupt Pin */
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- u8 MinGrant; /* 09 Minimum grant */
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- u8 MaxLat; /* Maximum Latency */
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- u16 PciStatus; /* 10 PCI Status */
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- u16 SubSysVId; /* 11 Subsystem Vendor Id */
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- u16 SubSysId; /* 12 Subsystem ID */
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- u16 DbgDevId; /* 13 Debug Device Id */
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- u16 DramRomFn; /* 14 Dram/Rom function */
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- u16 DSize2Pci; /* 15 DRAM size to PCI (bytes * 64K) */
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- u16 RSize2Pci; /* 16 ROM extension size to PCI (bytes * 4k) */
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- u8 NetIntPin1; /* 17 Network Interface Pin 1
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+ u16 id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/
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+ u16 eecode_size; /* 01 Size of EEPROM Codes (bytes * 4)*/
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+ u16 flash_size; /* 02 Flash size */
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+ u16 eeprom_size; /* 03 EEPROM Size */
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+ u16 vendor_id; /* 04 Vendor ID */
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+ u16 device_id; /* 05 Device ID */
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+ u8 revision_id; /* 06 Revision ID */
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+ u8 class_code[3]; /* 07 Class Code */
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+ u8 dbg_int_pin; /* 08 Debug Interrupt pin */
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+ u8 net_int_pin0; /* Network Interrupt Pin */
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+ u8 min_grant; /* 09 Minimum grant */
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+ u8 max_lat; /* Maximum Latency */
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+ u16 pci_status; /* 10 PCI Status */
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+ u16 sub_sys_vid; /* 11 Subsystem Vendor Id */
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+ u16 sub_sys_id; /* 12 Subsystem ID */
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+ u16 dbg_dev_id; /* 13 Debug Device Id */
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+ u16 dram_rom_fn; /* 14 Dram/Rom function */
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+ u16 dsize2pci; /* 15 DRAM size to PCI (bytes * 64K) */
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+ u16 rsize2pci; /* 16 ROM extension size to PCI (bytes * 4k) */
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+ u8 net_int_pin1; /* 17 Network Interface Pin 1
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* (simba/leone only)
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*/
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- u8 NetIntPin2; /* Network Interface Pin 2 (simba/leone only)*/
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+ u8 net_int_pin2; /* Network Interface Pin 2 (simba/leone only)*/
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union {
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- u8 NetIntPin3; /* 18 Network Interface Pin 3 (simba only) */
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- u8 FreeTime; /* FreeTime setting (leone/mojave only) */
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+ u8 net_int_pin3;/* 18 Network Interface Pin 3 (simba only) */
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+ u8 free_time; /* FreeTime setting (leone/mojave only) */
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} u1;
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- u8 TBIctl; /* 10-bit interface control (Mojave only) */
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- u16 DramSize; /* 19 DRAM size (bytes * 64k) */
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+ u8 tbi_ctl; /* 10-bit interface control (Mojave only) */
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+ u16 dram_size; /* 19 DRAM size (bytes * 64k) */
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union {
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struct {
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/* Mac Interface Specific portions */
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- struct slic_config_mac MacInfo[SLIC_NBR_MACS];
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+ struct slic_config_mac mac_info[SLIC_NBR_MACS];
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} mac; /* MAC access for all boards */
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struct {
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/* use above struct for MAC access */
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struct slic_config_mac pad[SLIC_NBR_MACS - 1];
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- u16 DeviceId2; /* Device ID for 2nd PCI function */
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- u8 IntPin2; /* Interrupt pin for 2nd PCI function */
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- u8 ClassCode2[3]; /* Class Code for 2nd PCI function */
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+ u16 device_id2; /* Device ID for 2nd PCI function */
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+ u8 int_pin2; /* Interrupt pin for 2nd PCI function */
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+ u8 class_code2[3]; /* Class Code for 2nd PCI function */
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} mojave; /* 2nd function access for gigabit board */
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} u2;
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- u16 CfgByte6; /* Config Byte 6 */
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- u16 PMECapab; /* Power Mgment capabilities */
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- u16 NwClkCtrls; /* NetworkClockControls */
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- u8 FruFormat; /* Alacritech FRU format type */
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- struct atk_fru AtkFru; /* Alacritech FRU information */
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- u8 OemFruFormat; /* optional OEM FRU format type */
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- union oemfru OemFru; /* optional OEM FRU information */
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- u8 Pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes
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+ u16 cfg_byte6; /* Config Byte 6 */
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+ u16 pme_capab; /* Power Mgment capabilities */
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+ u16 nw_clk_ctrls; /* NetworkClockControls */
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+ u8 fru_format; /* Alacritech FRU format type */
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+ struct atk_fru atk_fru; /* Alacritech FRU information */
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+ u8 oem_fru_format; /* optional OEM FRU format type */
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+ union oemfru oem_fru; /* optional OEM FRU information */
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+ u8 pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes
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* (if OEM FRU info exists) and two unusable
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* bytes at the end
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*/
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@@ -577,46 +577,46 @@ struct slic_eeprom {
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/* SLIC EEPROM structure for Oasis */
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struct oslic_eeprom {
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- u16 Id; /* 00 EEPROM/FLASH Magic code 'A5A5' */
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- u16 EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
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- u16 FlashConfig0; /* 02 Flash Config for SPI device 0 */
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- u16 FlashConfig1; /* 03 Flash Config for SPI device 1 */
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- u16 VendorId; /* 04 Vendor ID */
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- u16 DeviceId; /* 05 Device ID (function 0) */
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- u8 RevisionId; /* 06 Revision ID */
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- u8 ClassCode[3]; /* 07 Class Code for PCI function 0 */
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- u8 IntPin1; /* 08 Interrupt pin for PCI function 1*/
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- u8 ClassCode2[3]; /* 09 Class Code for PCI function 1 */
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- u8 IntPin2; /* 10 Interrupt pin for PCI function 2*/
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- u8 IntPin0; /* Interrupt pin for PCI function 0*/
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- u8 MinGrant; /* 11 Minimum grant */
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- u8 MaxLat; /* Maximum Latency */
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- u16 SubSysVId; /* 12 Subsystem Vendor Id */
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- u16 SubSysId; /* 13 Subsystem ID */
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- u16 FlashSize; /* 14 Flash size (bytes / 4K) */
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- u16 DSize2Pci; /* 15 DRAM size to PCI (bytes / 64K) */
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- u16 RSize2Pci; /* 16 Flash (ROM extension) size to PCI
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+ u16 id; /* 00 EEPROM/FLASH Magic code 'A5A5' */
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+ u16 eecode_size; /* 01 Size of EEPROM Codes (bytes * 4)*/
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+ u16 flash_config0; /* 02 Flash Config for SPI device 0 */
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+ u16 flash_config1; /* 03 Flash Config for SPI device 1 */
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+ u16 vendor_id; /* 04 Vendor ID */
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+ u16 device_id; /* 05 Device ID (function 0) */
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+ u8 revision_id; /* 06 Revision ID */
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+ u8 class_code[3]; /* 07 Class Code for PCI function 0 */
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+ u8 int_pin1; /* 08 Interrupt pin for PCI function 1*/
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+ u8 class_code2[3]; /* 09 Class Code for PCI function 1 */
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+ u8 int_pin2; /* 10 Interrupt pin for PCI function 2*/
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+ u8 int_pin0; /* Interrupt pin for PCI function 0*/
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+ u8 min_grant; /* 11 Minimum grant */
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+ u8 max_lat; /* Maximum Latency */
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+ u16 sub_sys_vid; /* 12 Subsystem Vendor Id */
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+ u16 sub_sys_id; /* 13 Subsystem ID */
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+ u16 flash_size; /* 14 Flash size (bytes / 4K) */
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+ u16 dsize2pci; /* 15 DRAM size to PCI (bytes / 64K) */
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+ u16 rsize2pci; /* 16 Flash (ROM extension) size to PCI
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* (bytes / 4K)
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*/
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- u16 DeviceId1; /* 17 Device Id (function 1) */
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- u16 DeviceId2; /* 18 Device Id (function 2) */
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- u16 CfgByte6; /* 19 Device Status Config Bytes 6-7 */
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- u16 PMECapab; /* 20 Power Mgment capabilities */
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- u8 MSICapab; /* 21 MSI capabilities */
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- u8 ClockDivider; /* Clock divider */
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- u16 PciStatusLow; /* 22 PCI Status bits 15:0 */
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- u16 PciStatusHigh; /* 23 PCI Status bits 31:16 */
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- u16 DramConfigLow; /* 24 DRAM Configuration bits 15:0 */
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- u16 DramConfigHigh; /* 25 DRAM Configuration bits 31:16 */
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- u16 DramSize; /* 26 DRAM size (bytes / 64K) */
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- u16 GpioTbiCtl; /* 27 GPIO/TBI controls for functions 1/0 */
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- u16 EepromSize; /* 28 EEPROM Size */
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- struct slic_config_mac MacInfo[2]; /* 29 MAC addresses (2 ports) */
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- u8 FruFormat; /* 35 Alacritech FRU format type */
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- struct atk_fru AtkFru; /* Alacritech FRU information */
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- u8 OemFruFormat; /* optional OEM FRU format type */
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- union oemfru OemFru; /* optional OEM FRU information */
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- u8 Pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes
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+ u16 device_id1; /* 17 Device Id (function 1) */
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+ u16 device_id2; /* 18 Device Id (function 2) */
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+ u16 cfg_byte6; /* 19 Device Status Config Bytes 6-7 */
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+ u16 pme_capab; /* 20 Power Mgment capabilities */
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+ u8 msi_capab; /* 21 MSI capabilities */
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+ u8 clock_divider; /* Clock divider */
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+ u16 pci_status_low; /* 22 PCI Status bits 15:0 */
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+ u16 pci_status_high; /* 23 PCI Status bits 31:16 */
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+ u16 dram_config_low; /* 24 DRAM Configuration bits 15:0 */
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+ u16 dram_config_high; /* 25 DRAM Configuration bits 31:16 */
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+ u16 dram_size; /* 26 DRAM size (bytes / 64K) */
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+ u16 gpio_tbi_ctl; /* 27 GPIO/TBI controls for functions 1/0 */
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+ u16 eeprom_size; /* 28 EEPROM Size */
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+ struct slic_config_mac mac_info[2]; /* 29 MAC addresses (2 ports) */
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+ u8 fru_format; /* 35 Alacritech FRU format type */
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+ struct atk_fru atk_fru; /* Alacritech FRU information */
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+ u8 oem_fru_format; /* optional OEM FRU format type */
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+ union oemfru oem_fru; /* optional OEM FRU information */
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+ u8 pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes
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* (if OEM FRU info exists) and two unusable
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* bytes at the end
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*/
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@@ -633,18 +633,18 @@ struct oslic_eeprom {
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* SlicGetConfigData()
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*/
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struct slic_config {
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- bool EepromValid; /* Valid EEPROM flag (checksum good?) */
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- u16 DramSize; /* DRAM size (bytes / 64K) */
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- struct slic_config_mac MacInfo[SLIC_NBR_MACS]; /* MAC addresses */
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- u8 FruFormat; /* Alacritech FRU format type */
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- struct atk_fru AtkFru; /* Alacritech FRU information */
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- u8 OemFruFormat; /* optional OEM FRU format type */
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+ bool eeprom_valid; /* Valid EEPROM flag (checksum good?) */
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+ u16 dram_size; /* DRAM size (bytes / 64K) */
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+ struct slic_config_mac mac_info[SLIC_NBR_MACS]; /* MAC addresses */
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+ u8 fru_format; /* Alacritech FRU format type */
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+ struct atk_fru atk_fru; /* Alacritech FRU information */
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+ u8 oem_fru_format; /* optional OEM FRU format type */
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union {
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struct vendor1_fru vendor1_fru;
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struct vendor2_fru vendor2_fru;
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struct vendor3_fru vendor3_fru;
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struct vendor4_fru vendor4_fru;
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- } OemFru;
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+ } oem_fru;
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};
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#pragma pack()
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