|
@@ -479,6 +479,15 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
|
|
amdgpu_ip_block_add(adev, &uvd_v7_0_ip_block);
|
|
amdgpu_ip_block_add(adev, &uvd_v7_0_ip_block);
|
|
amdgpu_ip_block_add(adev, &vce_v4_0_ip_block);
|
|
amdgpu_ip_block_add(adev, &vce_v4_0_ip_block);
|
|
break;
|
|
break;
|
|
|
|
+ case CHIP_RAVEN:
|
|
|
|
+ amdgpu_ip_block_add(adev, &vega10_common_ip_block);
|
|
|
|
+ amdgpu_ip_block_add(adev, &gfxhub_v1_0_ip_block);
|
|
|
|
+ amdgpu_ip_block_add(adev, &mmhub_v1_0_ip_block);
|
|
|
|
+ amdgpu_ip_block_add(adev, &gmc_v9_0_ip_block);
|
|
|
|
+ amdgpu_ip_block_add(adev, &vega10_ih_ip_block);
|
|
|
|
+ amdgpu_ip_block_add(adev, &gfx_v9_0_ip_block);
|
|
|
|
+ amdgpu_ip_block_add(adev, &sdma_v4_0_ip_block);
|
|
|
|
+ break;
|
|
default:
|
|
default:
|
|
return -EINVAL;
|
|
return -EINVAL;
|
|
}
|
|
}
|