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@@ -437,20 +437,6 @@
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reg-names = "csr-reg";
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reg-names = "csr-reg";
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clock-output-names = "dmaclk";
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clock-output-names = "dmaclk";
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};
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};
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-
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- i2cclk: i2cclk@17000000 {
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- status = "disabled";
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- compatible = "apm,xgene-device-clock";
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- #clock-cells = <1>;
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- clocks = <&ahbclk 0>;
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- reg = <0x0 0x17000000 0x0 0x2000>;
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- reg-names = "csr-reg";
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- csr-offset = <0xc>;
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- csr-mask = <0x4>;
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- enable-offset = <0x10>;
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- enable-mask = <0x4>;
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- clock-output-names = "i2cclk";
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- };
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};
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};
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msi: msi@79000000 {
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msi: msi@79000000 {
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@@ -789,7 +775,7 @@
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reg = <0x0 0x10512000 0x0 0x1000>;
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reg = <0x0 0x10512000 0x0 0x1000>;
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interrupts = <0 0x44 0x4>;
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interrupts = <0 0x44 0x4>;
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#clock-cells = <1>;
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#clock-cells = <1>;
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- clocks = <&i2cclk 0>;
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+ clocks = <&ahbclk 0>;
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bus_num = <0>;
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bus_num = <0>;
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};
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};
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