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@@ -147,16 +147,6 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
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max_lr_idx = vtr_to_max_lr_idx(val);
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nr_pri_bits = vtr_to_nr_pri_bits(val);
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- switch (nr_pri_bits) {
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- case 7:
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- write_gicreg(cpu_if->vgic_ap1r[3], ICH_AP1R3_EL2);
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- write_gicreg(cpu_if->vgic_ap1r[2], ICH_AP1R2_EL2);
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- case 6:
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- write_gicreg(cpu_if->vgic_ap1r[1], ICH_AP1R1_EL2);
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- default:
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- write_gicreg(cpu_if->vgic_ap1r[0], ICH_AP1R0_EL2);
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- }
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-
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switch (nr_pri_bits) {
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case 7:
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write_gicreg(cpu_if->vgic_ap0r[3], ICH_AP0R3_EL2);
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@@ -167,6 +157,16 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
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write_gicreg(cpu_if->vgic_ap0r[0], ICH_AP0R0_EL2);
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}
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+ switch (nr_pri_bits) {
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+ case 7:
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+ write_gicreg(cpu_if->vgic_ap1r[3], ICH_AP1R3_EL2);
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+ write_gicreg(cpu_if->vgic_ap1r[2], ICH_AP1R2_EL2);
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+ case 6:
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+ write_gicreg(cpu_if->vgic_ap1r[1], ICH_AP1R1_EL2);
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+ default:
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+ write_gicreg(cpu_if->vgic_ap1r[0], ICH_AP1R0_EL2);
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+ }
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+
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switch (max_lr_idx) {
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case 15:
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write_gicreg(cpu_if->vgic_lr[VGIC_V3_LR_INDEX(15)], ICH_LR15_EL2);
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