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+* UniPhier Thermal bindings
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+
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+This describes the devicetree bindings for thermal monitor supported by
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+PVT(Process, Voltage and Temperature) monitoring unit implemented on Socionext
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+UniPhier SoCs.
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+
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+Required properties:
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+- compatible :
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+ - "socionext,uniphier-pxs2-thermal" : For UniPhier PXs2 SoC
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+ - "socionext,uniphier-ld20-thermal" : For UniPhier LD20 SoC
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+- interrupts : IRQ for the temperature alarm
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+- #thermal-sensor-cells : Should be 0. See ./thermal.txt for details.
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+
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+Optional properties:
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+- socionext,tmod-calibration: A pair of calibrated values referred from PVT,
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+ in case that the values aren't set on SoC,
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+ like a reference board.
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+
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+Example:
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+
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+ sysctrl@61840000 {
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+ compatible = "socionext,uniphier-ld20-sysctrl",
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+ "simple-mfd", "syscon";
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+ reg = <0x61840000 0x10000>;
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+ ...
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+ pvtctl: pvtctl {
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+ compatible = "socionext,uniphier-ld20-thermal";
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+ interrupts = <0 3 1>;
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+ #thermal-sensor-cells = <0>;
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+ };
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+ ...
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+ };
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+
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+ thermal-zones {
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+ cpu_thermal {
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+ polling-delay-passive = <250>; /* 250ms */
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+ polling-delay = <1000>; /* 1000ms */
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+ thermal-sensors = <&pvtctl>;
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+
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+ trips {
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+ cpu_crit: cpu_crit {
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+ temperature = <110000>; /* 110C */
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+ hysteresis = <2000>;
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+ type = "critical";
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+ };
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+ cpu_alert: cpu_alert {
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+ temperature = <100000>; /* 100C */
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+ hysteresis = <2000>;
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+ type = "passive";
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+ };
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+ };
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+
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+ cooling-maps {
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+ map0 {
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+ trip = <&cpu_alert>;
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+ cooling-device = <&cpu0 (-1) (-1)>;
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+ };
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+ map1 {
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+ trip = <&cpu_alert>;
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+ cooling-device = <&cpu2 (-1) (-1)>;
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+ };
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+ };
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+ };
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+ };
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