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@@ -1314,12 +1314,7 @@ void enable_sep_cpu(void)
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tss->x86_tss.ss1 = __KERNEL_CS;
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wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0);
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-
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- wrmsr(MSR_IA32_SYSENTER_ESP,
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- (unsigned long)&get_cpu_entry_area(cpu)->tss +
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- offsetofend(struct tss_struct, SYSENTER_stack),
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- 0);
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-
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+ wrmsr(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_SYSENTER_stack(cpu) + 1), 0);
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wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);
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put_cpu();
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@@ -1436,9 +1431,7 @@ void syscall_init(void)
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* AMD doesn't allow SYSENTER in long mode (either 32- or 64-bit).
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*/
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wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);
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- wrmsrl_safe(MSR_IA32_SYSENTER_ESP,
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- (unsigned long)&get_cpu_entry_area(cpu)->tss +
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- offsetofend(struct tss_struct, SYSENTER_stack));
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+ wrmsrl_safe(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_SYSENTER_stack(cpu) + 1));
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wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat);
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#else
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wrmsrl(MSR_CSTAR, (unsigned long)ignore_sysret);
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@@ -1653,8 +1646,7 @@ void cpu_init(void)
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*/
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set_tss_desc(cpu, &get_cpu_entry_area(cpu)->tss.x86_tss);
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load_TR_desc();
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- load_sp0((unsigned long)&get_cpu_entry_area(cpu)->tss +
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- offsetofend(struct tss_struct, SYSENTER_stack));
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+ load_sp0((unsigned long)(cpu_SYSENTER_stack(cpu) + 1));
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load_mm_ldt(&init_mm);
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