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@@ -235,9 +235,26 @@ void __init time_init(void)
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cr16_hz = 100 * PAGE0->mem_10msec; /* Hz */
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cr16_hz = 100 * PAGE0->mem_10msec; /* Hz */
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- /* register at clocksource framework */
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- clocksource_register_hz(&clocksource_cr16, cr16_hz);
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-
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/* register as sched_clock source */
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/* register as sched_clock source */
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sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz);
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sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz);
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}
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}
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+
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+static int __init init_cr16_clocksource(void)
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+{
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+ /*
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+ * The cr16 interval timers are not syncronized across CPUs, so mark
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+ * them unstable and lower rating on SMP systems.
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+ */
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+ if (num_online_cpus() > 1) {
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+ clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
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+ clocksource_cr16.rating = 0;
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+ }
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+
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+ /* register at clocksource framework */
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+ clocksource_register_hz(&clocksource_cr16,
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+ 100 * PAGE0->mem_10msec);
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+
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+ return 0;
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+}
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+
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+device_initcall(init_cr16_clocksource);
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