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@@ -40,7 +40,6 @@
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static const struct dwc2_core_params params_hi6220 = {
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.otg_cap = 2, /* No HNP/SRP capable */
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- .otg_ver = 0, /* 1.3 */
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = 0, /* High Speed */
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@@ -71,7 +70,6 @@ static const struct dwc2_core_params params_hi6220 = {
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static const struct dwc2_core_params params_bcm2835 = {
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.otg_cap = 0, /* HNP/SRP capable */
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- .otg_ver = 0, /* 1.3 */
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = 0, /* High Speed */
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@@ -101,7 +99,6 @@ static const struct dwc2_core_params params_bcm2835 = {
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static const struct dwc2_core_params params_rk3066 = {
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.otg_cap = 2, /* non-HNP/non-SRP */
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- .otg_ver = -1,
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = -1,
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@@ -132,7 +129,6 @@ static const struct dwc2_core_params params_rk3066 = {
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static const struct dwc2_core_params params_ltq = {
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.otg_cap = 2, /* non-HNP/non-SRP */
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- .otg_ver = -1,
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.dma_desc_enable = -1,
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.dma_desc_fs_enable = -1,
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.speed = -1,
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@@ -163,7 +159,6 @@ static const struct dwc2_core_params params_ltq = {
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static const struct dwc2_core_params params_amlogic = {
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.otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE,
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- .otg_ver = -1,
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = DWC2_SPEED_PARAM_HIGH,
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@@ -194,7 +189,6 @@ static const struct dwc2_core_params params_amlogic = {
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static const struct dwc2_core_params params_default = {
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.otg_cap = -1,
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- .otg_ver = -1,
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/*
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* Disable descriptor dma mode by default as the HW can support
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@@ -978,22 +972,6 @@ static void dwc2_set_param_ahbcfg(struct dwc2_hsotg *hsotg, int val)
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GAHBCFG_HBSTLEN_SHIFT;
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}
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-static void dwc2_set_param_otg_ver(struct dwc2_hsotg *hsotg, int val)
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-{
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- if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
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- if (val >= 0) {
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- dev_err(hsotg->dev,
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- "'%d' invalid for parameter otg_ver\n", val);
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- dev_err(hsotg->dev,
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- "otg_ver must be 0 (for OTG 1.3 support) or 1 (for OTG 2.0 support)\n");
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- }
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- val = 0;
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- dev_dbg(hsotg->dev, "Setting otg_ver to %d\n", val);
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- }
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-
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- hsotg->params.otg_ver = val;
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-}
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-
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static void dwc2_set_param_uframe_sched(struct dwc2_hsotg *hsotg, int val)
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{
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if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
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@@ -1154,7 +1132,6 @@ static void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
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params->en_multiple_tx_fifo);
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dwc2_set_param_reload_ctl(hsotg, params->reload_ctl);
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dwc2_set_param_ahbcfg(hsotg, params->ahbcfg);
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- dwc2_set_param_otg_ver(hsotg, params->otg_ver);
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dwc2_set_param_uframe_sched(hsotg, params->uframe_sched);
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dwc2_set_param_external_id_pin_ctl(hsotg, params->external_id_pin_ctl);
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dwc2_set_param_hibernation(hsotg, params->hibernation);
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