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@@ -228,6 +228,9 @@ enum {
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#define GEN8_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT 0x17
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#define GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT 0x26
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+/* Typical size of the average request (2 pipecontrols and a MI_BB) */
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+#define EXECLISTS_REQUEST_SIZE 64 /* bytes */
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+
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static int execlists_context_deferred_alloc(struct intel_context *ctx,
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struct intel_engine_cs *engine);
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static int intel_lr_context_pin(struct intel_context *ctx,
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@@ -681,7 +684,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
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* we start building the request - in which case we will just
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* have to repeat work.
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*/
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- request->reserved_space += MIN_SPACE_FOR_ADD_REQUEST;
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+ request->reserved_space += EXECLISTS_REQUEST_SIZE;
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if (request->ctx->engine[engine->id].state == NULL) {
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ret = execlists_context_deferred_alloc(request->ctx, engine);
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@@ -727,7 +730,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
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* to cancel/unwind this request now.
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*/
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- request->reserved_space -= MIN_SPACE_FOR_ADD_REQUEST;
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+ request->reserved_space -= EXECLISTS_REQUEST_SIZE;
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return 0;
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err_unpin:
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