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@@ -1764,11 +1764,7 @@ static int gfx_v9_0_init_rlc_save_restore_list(struct amdgpu_device *adev)
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static void gfx_v9_0_enable_save_restore_machine(struct amdgpu_device *adev)
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{
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- u32 tmp = 0;
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-
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- tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL));
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- tmp |= RLC_SRM_CNTL__SRM_ENABLE_MASK;
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- WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL), tmp);
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+ WREG32_FIELD15(GC, 0, RLC_SRM_CNTL, SRM_ENABLE, 1);
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}
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static void pwr_10_0_gfxip_control_over_cgpg(struct amdgpu_device *adev,
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