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@@ -53,6 +53,8 @@
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/* Helper for fifo size calculation */
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#define DW_UART_CPR_FIFO_SIZE(a) (((a >> 16) & 0xff) * 16)
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+/* DesignWare specific register fields */
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+#define DW_UART_MCR_SIRE BIT(6)
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struct dw8250_data {
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u8 usr_reg;
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@@ -254,6 +256,22 @@ out:
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serial8250_do_set_termios(p, termios, old);
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}
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+static void dw8250_set_ldisc(struct uart_port *p, struct ktermios *termios)
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+{
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+ struct uart_8250_port *up = up_to_u8250p(p);
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+ unsigned int mcr = p->serial_in(p, UART_MCR);
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+
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+ if (up->capabilities & UART_CAP_IRDA) {
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+ if (termios->c_line == N_IRDA)
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+ mcr |= DW_UART_MCR_SIRE;
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+ else
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+ mcr &= ~DW_UART_MCR_SIRE;
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+
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+ p->serial_out(p, UART_MCR, mcr);
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+ }
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+ serial8250_do_set_ldisc(p, termios);
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+}
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+
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/*
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* dw8250_fallback_dma_filter will prevent the UART from getting just any free
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* channel on platforms that have DMA engines, but don't have any channels
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@@ -357,6 +375,9 @@ static void dw8250_setup_port(struct uart_port *p)
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if (reg & DW_UART_CPR_AFCE_MODE)
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up->capabilities |= UART_CAP_AFE;
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+
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+ if (reg & DW_UART_CPR_SIR_MODE)
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+ up->capabilities |= UART_CAP_IRDA;
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}
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static int dw8250_probe(struct platform_device *pdev)
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@@ -392,6 +413,7 @@ static int dw8250_probe(struct platform_device *pdev)
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p->iotype = UPIO_MEM;
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p->serial_in = dw8250_serial_in;
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p->serial_out = dw8250_serial_out;
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+ p->set_ldisc = dw8250_set_ldisc;
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p->membase = devm_ioremap(dev, regs->start, resource_size(regs));
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if (!p->membase)
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